Memory array, memorizer, and memory array control method

Abstract

The invention discloses a memory array, a memorizer, and a memory array control method. Power consumption of the whole memory array is reduced, and memory capacity is increased. The memory array comprises memory cells; a top port of each memory cell is connected with a cathode bus and an anode bus respectively; a read-write device of each memory cell comprises a first port and a second port; a memory area of each memory cell comprises a third port and a fourth port; the first port is connected with a second line gate tube; the second port is connected with a line decoder via a first switching tube; the third port is connected with a first line gate tube and the line decoder via a second switching tube; the fourth port is connected with the first line gate tube and the line decoder via a third switching tube; gating of the memory cell and inputting of signals used for shifting operation are realized via controlling on the cathode bus, the anode bus, the line decoder, and the first line gate tube; gating of the read-write device and inputting of signals used for read-write operation are realized via controlling on the line decoder and the second line gate tube.

Description

technical field [0001] The invention relates to the technical field of communication, in particular to a storage array, a memory and a storage array control method. Background technique [0002] Generally, there are two ways of data storage: flash memory and hard disk storage. Among them, flash memory has fast reading speed, small capacity and high price. Hard disk storage has slow read and write speed and large capacity, but the price is cheap. Based on this, a new storage method of nano-track Racetrack has emerged, which has the characteristics of high-performance flash memory, low-cost and high-capacity hard disk. Existing nano-tracks are made of magnetic materials and include a plurality of magnetic regions, namely magnetic domains. Adjacent magnetic domains are separated by magnetic domain walls, and the plurality of magnetic regions and magnetic domain walls form a U-shaped storage track. [0003] At present, there is a storage array structure based on U-shaped stor...

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Problems solved by technology

[0004] However, in the process of realizing the present invention, the inventors found that the connection structure of the storage array is

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