Silicon bonding method
A silicon chip and bonding technology, applied in the field of semiconductors, can solve problems such as low bonding strength, falling off, and affecting device reliability, and achieve the effects of large bonding area, improved bonding strength, and good surface microscopic flatness
Active Publication Date: 2016-09-28
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Problems solved by technology
Obviously, such a bonding strength is very low, and it is easy to cause partial detachment or even complete detachment, which seriously affects the reliability of the device.
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[0032] The silicon wafer bonding method of the present invention will be described in more detail below in conjunction with the schematic diagram, wherein a preferred embodiment of the present invention is represented, it should be understood that those skilled in the art can modify the present invention described here, and still realize the advantages of the present invention Effect. Therefore, the following description should be understood as the broad knowledge of those skilled in the art, but not as a limitation of the present invention.
[0033] In the interest of clarity, not all features of an actual implementation are described. In the following description, well-known functions and constructions are not described in detail since they would obscure the invention with unnecessary detail. It should be appreciated that in the development of any actual embodiment, numerous implementation details must be worked out to achieve the developer's specific goals, such as changin...
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Abstract
The present invention discloses a silicon wafer bonding method, which comprises: providing a first silicon wafer, and forming an isolated island structure in the first silicon wafer; forming a sacrificial oxidation layer on the first silicon wafer; removing the sacrificial oxidation layer so as to make the edge silicon surface of the isolated island structure be lower than the center region; forming a bonding oxidation layer on the first silicon wafer, wherein the edge of the bonding oxidation layer on the isolated island structure is thicker than the center region; and providing a second silicon wafer, and bonding the second silicon wafer and the first silicon wafer through the isolated island structure. According to the present invention, with the mutual compensation of the silicon surface of the isolated island structure and the bonding oxidation layer thickness, the good surface micro-flatness is obtained, the lager bonding area can be obtained when the first silicon wafer and the second silicon wafer are bonded, and the bonding strength is improved.
Description
technical field [0001] The invention relates to the technical field of semiconductors, in particular to a silicon wafer bonding method. Background technique [0002] In recent years, with the development of micro-electromechanical system (Micro-Electrico-Mechanical-System, MEMS) technology, various micro-electromechanical devices, including: micro-sensors, micro-actuators, etc., have achieved miniaturization, which is beneficial to Improve device integration, so MEMS has become one of the main development directions. [0003] Common fabrication methods for MEMS include bulk silicon fabrication processes, specifically involving the bonding of silicon wafers. Please refer below as Figure 1-5 The schematic diagram of the device structure in the silicon wafer bonding process shown in the prior art. [0004] Such as figure 1 As shown, first, a first silicon wafer 1 is provided, and a mask layer 2 is formed on the first silicon wafer 1 . Then, the mask layer 2 is patterned, ...
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IPC IPC(8): B81C3/00
Inventor 徐爱斌王俊杰
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP