A kind of testing method of parallelogram led chip

A technology of LED chips and parallelograms, which is applied in the field of testing parallelogram LED chips, can solve the problems of cumbersome testing process of parallelogram LED chips and the inability to correspond one-to-one with photoelectric characteristic test data, so as to avoid inability to correspond one by one and solve production difficulties , The effect of simplifying the production process

Active Publication Date: 2018-03-16
QUANZHOU SANAN SEMICON TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The invention provides a test method for LED chips, which solves the problem that the existing parallelogram LED chip test process is cumbersome, and it is impossible to directly correspond the photoelectric characteristic test data with the chip coordinate positions one by one, thereby greatly improving test efficiency.

Method used

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  • A kind of testing method of parallelogram led chip
  • A kind of testing method of parallelogram led chip
  • A kind of testing method of parallelogram led chip

Examples

Experimental program
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Embodiment 1

[0021] Such as figure 2 As shown, this embodiment provides a 4-pin point measurement method for a parallelogram LED chip, that is, a testing machine with 2 sets of probe modules is used to test the photoelectric characteristics of 2 chip units to be tested, and the probe modules simultaneously test 2 For adjacent chip units in the same row, the inner angles of the chip units are 60° and 120°. The test sequence and direction of the chip are shown by the arrows, first from left to right, then from top to bottom. When the next two rows of core particles (shaded slashes) are tested, a rectangular coordinate system is just formed, that is, the current spot measurement The two core particles and the two core particles of the lower oblique line are orthogonally translated, and the abscissas of the center points of the upper and lower adjacent chip units to be tested are consistent. At this time, the photoelectric characteristic parameters of the chip and the coordinate position of ...

Embodiment 2

[0023] Such as image 3 As shown, this embodiment provides a 6-pin spot test method for a parallelogram LED chip, that is, a testing machine with 3 sets of probe modules is used to test the photoelectric characteristics of 3 chip units to be tested, and the probe modules simultaneously test 3 Adjacent chip units in the same line (the position where the probe module contacts the electrodes, not shown in the figure), the inner angles of the chip units are 45° and 135°. The test sequence and direction of the chip are shown by the arrows, first from left to right along the X axis, and then from top to bottom along the Y axis. The core grain and the two core grains with the oblique line below are orthogonally translated, and the abscissas of the center points of the upper and lower adjacent chip units to be tested (located in the dotted line box) are consistent. At this time, the photoelectric characteristic parameters of the chip and the coordinate position of the center point of...

Embodiment 3

[0025] Such as Figure 4 As shown, different from Embodiment 2, this embodiment provides an 8-pin point measurement method for a parallelogram LED chip, that is, a testing machine with 4 sets of probe modules is used to test the photoelectric characteristics of 4 chip units to be tested. Its probe module tests 4 adjacent chip units (located in the dotted line box) at the same time, and the chip units to be tested are combined in 2×2 rows and columns, and the test time is shortened to 1 / 4.

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Abstract

A method for testing a parallelogram LED semiconductor chip, characterized in that: the inner angle of the parallelogram LED chip used is a specific angle, and the testing machine has two or more sets of test needles, that is, multiple sets of test modules, which can simultaneously test specific Two or more rows of chips avoid the problem that the test data cannot be matched one by one or the test system cannot find the chips correctly.

Description

technical field [0001] The invention relates to semiconductor device testing, in particular to a testing method for parallelogram LED chips. Background technique [0002] Most of the existing LED semiconductor chips are rectangular. When the emission angle is greater than 23.5° and less than 66.5°, the light of the chip will only be reflected back and forth inside the chip, and the photons cannot escape from the outside of the chip, resulting in loss of light output from the chip. At present, the methods used to improve the light-emitting efficiency of LED chips include patterning the light-emitting surface of the LED chip, patterning the light-emitting sidewall of the LED chip, and deforming the shape of the LED chip (such as a parallelogram), etc. These technologies can be used to a certain extent. Improve the luminous efficiency of LED chips. However, although the design of parallelogram LED chips can improve the external quantum efficiency, since the chips are arranged i...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/26
Inventor 林潇雄邱树添林素慧彭康伟许圣贤
Owner QUANZHOU SANAN SEMICON TECH CO LTD
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