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A method for manufacturing ultra-thin capping in wafer-level packaging

A technology of wafer-level packaging and manufacturing methods, applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve problems such as easy cracking and packaging process failure, and achieve the effect of reducing the risk of cracking

Active Publication Date: 2017-12-22
NAT CENT FOR ADVANCED PACKAGING CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, a cover that is too thin cannot withstand the stress of the back process, and is prone to cracking during the back process or subsequent cutting process, resulting in the failure of the packaging process

Method used

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  • A method for manufacturing ultra-thin capping in wafer-level packaging
  • A method for manufacturing ultra-thin capping in wafer-level packaging
  • A method for manufacturing ultra-thin capping in wafer-level packaging

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0040] A method for manufacturing an ultra-thin cover in a wafer-level package of the present invention comprises the following steps:

[0041] a. Temporarily bond the integral cover 3 on the back of the loading material 1 through the first adhesive 2 with a thickness of 10 μm. The first adhesive 2 is a heat-sensitive epoxy resin. The gluing method of the first adhesive 2 is as follows Conventional spraying method, and the temporary bonding method is thermocompression bonding method, such as figure 1 shown;

[0042] b. Use an organic material film 4 with a thickness of 50 μm to protect the overall cover 3, such as figure 2 shown;

[0043] c. Remove the integral cover 3 corresponding to the position of the cutting line, and form several cover units 3.1 on the back of the load material 1, such as image 3 shown;

[0044] d. Remove the film 4, and fill the polyacrylate photoresist 5 in the cutting line, so that the glue surface of the photoresist 5 will submerge the capping ...

Embodiment 2

[0051] A method for manufacturing an ultra-thin cover in a wafer-level package of the present invention comprises the following steps:

[0052] a. Temporarily bond the integral cover 3 on the back of the loading material 1 through the first adhesive 2 with a thickness of 10 μm. The first adhesive 2 is a heat-sensitive epoxy resin. The gluing method of the first adhesive 2 is as follows Conventional glue hanging method, and the temporary bonding method is thermocompression bonding method, such as figure 1 shown;

[0053] b. Use an inorganic material film 4 with a thickness of 200 μm to protect the overall cover 3, such as figure 2 shown;

[0054] c. Remove the integral cover 3 corresponding to the position of the cutting line, and form several cover units 3.1 on the back of the load material 1, such as image 3 shown;

[0055]d. Remove the film 4, and fill the cutting line with photoresist 5 made of polyisoprene rubber, so that the rubber surface of the photoresist 5 will ...

Embodiment 3

[0062] A method for manufacturing an ultra-thin cover in a wafer-level package of the present invention comprises the following steps:

[0063] a. Temporarily bond the overall cover 3 on the back of the loading material 1 through the first adhesive 2 with a thickness of 50 μm. The first adhesive 2 is UV epoxy resin. The gluing method of the first adhesive 2 is as follows Conventional glue rolling method, and the temporary bonding method is radiation bonding method, such as figure 1 shown;

[0064] b. Use an organic material film 4 with a thickness of 100 μm to protect the overall cover 3, such as figure 2 shown;

[0065] c. Remove the integral cover 3 corresponding to the position of the cutting line, and form several cover units 3.1 on the back of the load material 1, such as image 3 shown;

[0066] d. Remove the film 4, and fill the polyacrylate photoresist 5 in the cutting line, so that the glue surface of the photoresist 5 will submerge the capping unit 3.1, as Fig...

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Abstract

The invention relates to a manufacturing method of an ultrathin seal cover in wafer-level package. The method comprises the following steps: temporarily bonding an integrated seal cover on the back surface of a load material through first bonding glue; protecting the integrated seal cover by utilizing a thin film; removing the integrated seal cover corresponding to cutting channels and forming a plurality of seal cover units on the back surface of the load material; removing the thin film and filling photoresist into the cutting channels to enable the photoresist surface of the photoresist to cover the seal cover units; reserving the photoresist, corresponding to the cutting channel areas, as a support wall through photoetching; coating second bonding glue on the support wall and bonding the front surface of a wafer and the support wall together through the second bonding glue; carrying out back side technology of the wafer and leading out PAD, and carrying out de-bonding; cleaning the residual glue on the surfaces of the seal cover units to enable the seal cover units to be separated from the load material; and cutting the wafer along the cutting channels to form independent chips. The method reduces the risk of fracture of the ultrathin seal cover units.

Description

technical field [0001] The invention relates to a method for manufacturing an ultra-thin cover in wafer-level packaging, and the invention belongs to the technical field of semiconductor packaging. Background technique [0002] With the development of semiconductor technology, the feature size of integrated circuits continues to shrink, and the interconnection density of devices continues to increase. Therefore, wafer-level packaging (Wafer Level Package, WLP) has gradually replaced wire-bonding packaging and has become a more commonly used packaging method. Wafer-level packaging technology is a technology that performs packaging and testing on the entire wafer and then cuts it to obtain a single finished chip. The size of the packaged chip is exactly the same as that of the bare chip, which conforms to the market's increasingly light, small, short and thin microelectronic products. and low-price requirements. [0003] Wafer-level packaging generally requires interconnecti...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/50H01L21/56
CPCH01L21/50H01L21/56H01L21/568H01L2224/97
Inventor 冯光建
Owner NAT CENT FOR ADVANCED PACKAGING CO LTD