A kind of manufacturing method of ldmos device

Abstract

The invention belongs to semiconductor technology, and specifically relates to a manufacturing method of an LDMOS device. The main steps of the LDMOS device manufacturing method of the present invention are: forming a first conductive type semiconductor active layer on the upper surface of the second conductive type semiconductor substrate; implanting ions into the upper layer of the first conductive type semiconductor active layer to form a dielectric isolation layer, the The first conductive type semiconductor active layer on the upper surface of the dielectric isolation layer forms an auxiliary semiconductor layer; the second conductive type semiconductor impurities are implanted in the auxiliary semiconductor layer; the two ends of the auxiliary semiconductor layer are etched to the surface of the dielectric isolation layer to form a first active region A window and a second active region window; the body region and source metal are fabricated in the first active region window, and the drain contact region and drain metal are fabricated in the second active region window. The beneficial effect of the present invention is that the extended gate can be guaranteed to be made of single crystal silicon material, and the influence of the polycrystalline gate on the electrical performance of the extended gate device can be avoided.

Description

technical field [0001] The invention belongs to semiconductor technology, and in particular relates to a manufacturing method of an LDMOS (Lateral Double-diffusion Metal Oxide Semiconductor field effect transistor, lateral double-diffusion metal-oxide-semiconductor field effect transistor). Background technique [0002] Compared with VDMOS (Vertical Double-diffused MOSFET, vertical double-diffused metal-oxide-semiconductor field-effect transistor), LDMOS has the characteristics of fast switching speed and easy integration. Therefore, LDMOS is widely used in power integrated circuits, especially in radio frequency circuits. [0003] The key parameters of LDMOS are epitaxial layer thickness, doping concentration region and drift length. For conventional LDMOS, the specific on-resistance R on,sp There is a contradictory relationship between (specific on-resistance = on-resistance x device area) and withstand voltage BV: R on,sp ∝BV 2.5 . Reducing the doping concentration o...

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Problems solved by technology

[0004] Compared with single crystal silicon, polysilicon has disadvantages such as large leakage current and poor experiment repeatability, which will affect the electrical performance of the extended gate, so polysilicon is not suitable for making extended gates

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