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Substrate-less interproser technology for a stacked silicon interconnect technology (ssit) product

An insert, no substrate technology, applied in the application of non-metallic protective layers, printed circuit manufacturing, circuits, etc., can solve problems such as complex processes

Active Publication Date: 2015-11-11
XILINX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, fabricating an interposer substrate layer with TSVs for SSIT products can be a complex process

Method used

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  • Substrate-less interproser technology for a stacked silicon interconnect technology (ssit) product
  • Substrate-less interproser technology for a stacked silicon interconnect technology (ssit) product
  • Substrate-less interproser technology for a stacked silicon interconnect technology (ssit) product

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Embodiment Construction

[0031] Various features will be described hereinafter with reference to the drawings. It should be noted that the drawings are not drawn to scale and elements having similar structures or functions are denoted by like reference numerals throughout the drawings. It should be noted that the diagram is only intended to help illustrate this feature. This is not intended to be an exhaustive description of the present invention or to limit the scope of the present invention. Furthermore, an exemplary embodiment need not possess all of the illustrated features or advantages. A feature or advantage described in conjunction with a particular embodiment is not necessarily limited to that embodiment, but can be practiced in any other embodiment, even if not so stated.

[0032] Silicon Stacked Interconnect Technology (SSIT) involves packaging multiple integrated circuit (IC) die in a single package that includes an interposer and a package substrate. Using SSIT allows IC products, such...

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Abstract

A substrate-less interposer for a stacked silicon interconnect technology (SSIT) product, includes: a plurality of metallization layers, at least a bottom most layer of the metallization layers comprising a plurality of metal segments, wherein each of the plurality of metal segments is formed between a top surface and a bottom surface of the bottom most layer of the metallization layers, and the metal segments are separated by dielectric material in the bottom most layer; and a dielectric layer formed on the bottom surface of the bottom most layer, wherein the dielectric layer includes one or more openings for providing contact to the plurality of metal segments in the bottom most layer.

Description

technical field [0001] The embodiments described in this case relate generally to Stacked Silicon Interconnect Technology (SSIT) products, and more particularly to a substrate-free interposer technology for SSIT products. Background technique [0002] Silicon Stacked Interconnect Technology (SSIT) involves packaging multiple integrated circuit (IC) die in a single package that includes an interposer and a package substrate. The use of SSIT allows IC products such as FPGAs to be extended to higher density, lower power, greater functionality, and application-specific platform solutions with the advantages of low cost and fast time to market. [0003] Traditionally, SSIT products are implemented using an interposer comprising an interposer substrate layer on top of which multiple through-silicon vias (TSVs) and additional metallization layers are constructed. The interposer can provide a connection between the IC die and the packaging substrate. However, fabricating an interp...

Claims

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Application Information

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IPC IPC(8): H01L23/498H01L21/48H05K3/46H05K3/28H01L21/683H01L25/065H01L25/18H01L21/56H01L23/00H01L23/31
CPCH01L21/76802H01L21/4857H01L21/568H01L21/6835H01L23/3128H01L23/49811H01L23/49816H01L23/49822H01L23/5383H01L24/16H01L24/81H01L25/0655H01L25/18H01L2221/68359H01L2221/68381H01L2224/16225H01L2224/81005H01L2924/14H01L2924/15311H01L2924/18161H05K3/28H05K3/4682H01L2224/16227
Inventor 权云星苏芮戌·瑞玛林嘉金纳胡金重浩
Owner XILINX INC