Internal integration circuit interface device and signal generation method thereof

Abstract

The invention provides an internal integration circuit interface device and a signal generation method thereof. The internal integration circuit interface device comprises a logic signal generation circuit and a pulling-up circuit, and is characterized in that the logic signal generation circuit generates a first logic signal and a second logic signal, and a first transition time point when the first logic signal transits from the first logic potential to the second logic potential and a second transition time point when the second logic signal transits from the first logic potential to the second logic potential have time difference; and the pulling-up circuit provides first driving current between the first transition time point and the second transition time point so as to pull up the voltage potential of a first selected signal line of one of a data line and a clock pulse line, and provides second driving current after the second transition time point so as to maintain the voltage potential of the first selected signal line, wherein the first driving current is higher than the second driving current.

Description

technical field [0001] The present invention relates to a serial communication bus, and in particular to an internal integrated circuit interface device and a signal generation method thereof. Background technique [0002] With the advancement of semiconductor manufacturing technology, existing electronic devices can stably operate with the cooperation of high-frequency clock signals. Correspondingly, in the data transmission operation between the electronic devices, in order to effectively save the wiring area of ​​the data transmission wires between the electronic devices, the so-called serial data transmission interface has gradually become a trend. Among them, the internal integrated circuit (Inter-integrated circuit; I 2 C) is a commonly used serial data transmission interface. [0003] The internal integrated circuit is a serial communication bus using a multi-master-slave architecture. It is characterized by using a bidirectional open drain (OpenDrain) architecture ...

AI Technical Summary

Problems solved by technology

The existing internal integrated circuit is provided with a pull-up resistor to pull up the voltage potential on the data line or the clock line, but the time for the existing internal integrated circuit to pull up the voltage potential is slow, and the standard mode (Standard- mode) or fast transmission mode (Fastmode), the signal transition of at least one of the data line and the clock line is not fast enough, which will affect the stability of signal transmission or fail to increase the rate, and then reduce the belonging system. overall benefit

Although the high-speed transmission mode (HSmode) can achieve high speed, it requires additional special power consumption

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