DDR clock frequency control method and system

Abstract

The present invention discloses a DDR clock frequency control method and system. The method comprises: a mobile terminal detecting an operating frequency and a battery voltage of the CPU in a certain period, and obtaining a current operating frequency and a current battery voltage when a change of operating frequency or the battery voltage being detected; obtaining the current operating frequency, a product of a current frequency coefficient corresponding to the current operating frequency, a relatively small value among maximum values of a current clock frequency corresponding to the current battery voltage, and setting a current DDR clock frequency to the relatively small value. The DDR clock frequency of the mobile terminal disclosed by the invention can not only be adjusted according to the operating frequency of the CPU, but also can be dynamically adjusted according to the battery voltage, thereby ensuring the DDR clock frequency to be adjusted to an optimum operating frequency, and avoiding a problem of a liable procedure error in a low battery of the terminal.

Description

technical field [0001] The present invention relates to the technical field of communication, in particular to a DDR clock frequency control method and system. Background technique [0002] At present, mobile terminals generally use DDR (Double Data Rate, double-rate synchronous dynamic random access memory) as its memory; the DDR clock frequency is variable, which changes with the operating frequency of the central processing unit: when the central processing unit Set a higher DDR clock frequency when working at a high frequency, and set a lower DDR clock frequency when the CPU works at a low frequency. However, mobile terminals are mostly powered by batteries. When the battery voltage (or power) is low, it is difficult to ensure that DDR can work normally at high frequencies; Many applications will report errors when they are running. These are all caused by the abnormal operation of DDR when the voltage (or power) is low. [0003] Therefore, the prior art still needs to...

AI Technical Summary

Problems solved by technology

[0004] In view of the above-mentioned deficiencies in the prior art, the purpose of the present invention is to provide a DDR clock frequency control method and system, aiming to solve the defect in the prior art that the DDR of the mobile terminal cannot adjust the clock frequency in time due to the abnormal operation of the mobile terminal.

Images