Method for manufacturing semiconductor packages

Abstract

The present invention provides a method for manufacturing semiconductor packages. The method includes the steps as follows: providing a first bearing component with a semiconductor component, wherein, the first bearing component has a spacer layer jointed with the semiconductor layer, and forming a sealing layer on the spacer layer, wherein, the sealing layer has a first surface and a second surface opposite each other so that the sealing layer covers the semiconductor component and the first surface joints with the spacer layer; secondly, forming a plurality of openings on the second surface of the sealing layer so that the opening communicates the first surface with the second surface; thirdly, forming a second bearing component on the second surface of the sealing layer; and finally, removing the first bearing component and the spacer layer so as to expose the semiconductor component, the first surface of the sealing layer and the openings. According to the method, the opening manufacturing does not damage the construction of the second bearing component but only damage the spacer layer.

Description

Technical field [0001] The invention relates to a packaging process, in particular to a manufacturing method of a semiconductor package, which can improve the problem of laser damage to the conductive layer and residues. Background technique [0002] With the evolution of semiconductor packaging technology, semiconductor devices have developed different packaging types. In order to improve electrical functions and save packaging space, different three-dimensional packaging technologies have been developed, such as fan-out packaging stacking. (FanOutPackageonpackage, FOPoP for short), etc., in order to cope with the greatly increased number of input / output ports on various chips, and then integrate integrated circuits with different functions into a single package structure. This packaging method can play a system of packaging (SiP) heterogeneity The integration feature can integrate electronic components with different functions, such as memory, central processing unit, graphics ...

AI Technical Summary

Problems solved by technology

[0010] However, in the existing manufacturing method of the semiconductor package 1, a plurality of openings 130 are formed by laser, so not only the copper foil 120 is easily damaged and the yield rate of the subsequent fabrication of the circuit structure 16 is affected, but also the opening 130 is formed. The residues generated during the process (such as the residual glue of the sealing layer 13 or the peeled copper material, etc.) are very easy to accumulate at the bottom of the opening 130, so that the inside of the opening 130 needs to be cleaned first in the subsequent manufacturing process, so that the conductive Material fills the opening 130

[0011] In addition, the operation of cleaning the opening 130 not only increases the manufacturing cost, but also because the opening 130 has a high aspect ratio, it is usually difficult to completely remove the residues in the opening 130, which will affect the electrical properties of the conductive pillars 14. transfer yield

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