A Radiation Resistant Flip-Flop Circuit Structure Based on Single Phase Clock

Abstract

A radiation-resistant flip-flop circuit structure based on a single-phase clock, including a clock generation module, a data filtering module, a first single-phase clock basic flip-flop module, a second single-phase clock basic flip-flop module, a third single-phase clock Bit clock basic trigger module, first DICE hardening module, second DICE hardening module, third DICE hardening module, first C-unit module, second C-unit module, third C-unit module and election module. The flip-flop circuit structure of the present invention adopts single-phase clock technology. Compared with the existing flip-flop technology, it not only saves the area cost and reduces power consumption, but also avoids the timing redundancy in the flip-flop of the master-slave structure, and improves the efficiency of the flip-flop. Timing performance, in addition, the trigger circuit structure of the present invention adopts a hybrid DICE+TMR structure, which improves the trigger pulse of the trigger and enhances the ability to resist single event reversal and single event pulse.

Description

technical field [0001] The invention relates to a radiation-resistant trigger, in particular to a circuit structure of a radiation-resistant trigger based on a single-phase clock. Background technique [0002] The traditional MOS tube-level test and verification, the traditional master-slave DICE and TMR mixed anti-radiation D flip-flop has the following two problems: [0003] On the one hand, due to the large leakage power consumption in deep sub-micron, when the flip-flop unit area is too large, a large amount of power consumption will be added. The traditional DICE unit and TMR mixed structure will occupy a large area (it is the pre-reinforcement 15 times the area of ​​the flip-flop), and makes the power consumption of the structure larger (the average dynamic power consumption is 10 times that of the flip-flop before reinforcement); [0004] On the other hand, due to the process jitter (PVT) in the deep submicron process, the parasitic parameters have a great impact on ...

AI Technical Summary

Problems solved by technology

[0005] The technical problem solved by the present invention is: to overcome the defects of large flip-flop area overhead, high power consumption and poor timing performance in the prior art, and to provide a radiation-resistant clock technology based on single-phase clock technology using a hybrid DICE+TMR structure The trigger circuit structure improves the trigger pulse and enhances the ability to resist single event reversal and single event pulse

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