Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

The realization method of image super-resolution based on fpga

A super-resolution and implementation method technology, applied in image data processing, image data processing, instruments, etc., can solve the problems of unsatisfactory super-resolution image effect, high complexity of high-order interpolation method and inconvenient hardware implementation, etc., to improve the image quality. Processing rate, achieve super-resolution effect

Active Publication Date: 2018-08-31
NANJING INST OF RAILWAY TECH
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Traditional linear interpolation algorithms include nearest neighbor interpolation, bilinear interpolation, four-point bicubic interpolation, and six-point bicubic interpolation. Among them, the super-resolution image effect of nearest neighbor interpolation is not ideal, and the complexity of high-order interpolation method is too high for hardware implementation.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • The realization method of image super-resolution based on fpga
  • The realization method of image super-resolution based on fpga
  • The realization method of image super-resolution based on fpga

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0025] FPGA has two opposing performances: (1) It has parallel processing and pipeline technology, which can achieve high-performance processing, but M times the performance consumes M times logic; (2) has multiplexing technology, which can reduce logic, but control Complexity rises. Based on the functional characteristics of FPGA, the present invention proposes a two-level cycle scheduling mechanism based on single-input dual-output port RAM buffer to realize shared resource allocation and parallel pipeline processing. At the same time, Xilinx's FPGA is based on the LUT structure, which can realize floating-point operations and multiplication operations, but it will cause a serious waste of resources. In this paper, all floating-point numbers are integerized, and data operations are performed in the field of integers.

[0026] Bilinear interpolation determines a plane through four points, which is an over-constrained problem, so first-order interpolation on a rectangular gri...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a field programmable gate array (FPGA) based implementation method for image super resolution. The method comprises the following steps that a cycle control module controls cyclic dispatching of a random-access memory (RAM) module to achieve data writing; a RAM applying a single-input and dual-output port defines the depth of the RAM applying the single-input and dual-output port as a row of pixel points of a source image and the width as a pixel data width when the RAM module reads data so that adjacent two rows of pixels of source data are stored; and a weight acquired by a position analysis module is an normalization decimal and is mapped within an integer range for operation. By the FPGA based implementation method, the image processing rate is improved, and super resolution is achieved.

Description

technical field [0001] The invention relates to a method for realizing image super-resolution, in particular to a method for realizing image super-resolution based on FPGA. Background technique [0002] The usual image display device has a fixed resolution, and the low-resolution image data needs to be super-resolution processed to obtain a resolution that matches the display device to be displayed normally (such as HDTV, High-Definition TV). The essence of this process is The above is a kind of image super-resolution processing. [0003] Image super-resolution technology has been widely used in various fields, such as public security, medical imaging, military, geological, industrial and consumer electronics industries. Through this technology, the resolution of the image can be improved as much as possible to achieve better image recognition ability and recognition accuracy. [0004] With the increase of the amount of image data, higher requirements are put forward for t...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G06T1/00
Inventor 钟雪燕李春英
Owner NANJING INST OF RAILWAY TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com