NAT realization method and apparatus based on SOPC
A technology for realizing methods and purposes, applied in the field of network address translation, can solve problems such as functional complexity limitation, inflexibility, large size, etc., and achieve the effects of fast processing speed, flexible processing, and low cost
Active Publication Date: 2015-12-16
BEIJING TELIXIN ELECTRONICS TECH +1
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Problems solved by technology
[0011] 1. The implementation of NAT through pure logic has restrictions on the functional complexity;
[0012] 2. For specific applications, the existing implementation methods through FPGA or NP are not flexible enough;
[0013] 3. For small applications, the existing implementation methods are bulky, high power consumption, and high cost
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[0035] It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.
[0036] In this embodiment, a kind of implementation device based on SOPC NAT uses FPGA as the carrier, and the structural block diagram of the design scheme is as follows Figure 4 shown. The program consists of two parts, one part is the external memory mainly used to store and query the network address translation table and the external memory as the processor, the other part is mainly to complete the realization of the NAT function, mainly including the processor module, learning / processing module, The Ethernet interface module, the extraction module, the data buffer module, the NAT processing module, and the NAT reverse processing module are all realized by FPGA.
[0037] This solution supports NAT processing of TCP, UDP, and ICMP protocols. Because the storage, management and search of the NAT trans...
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The invention discloses an NAT realization method and apparatus based on SOPC. The method comprises the steps of: a learning / processing module judges whether itself can process the information, if so, the learning / processing module processes the information according to previously learnt contents and submits a processing result to an NAT processing module, and the NAT processing module determines whether submits the received information to a processor for processing. The apparatus comprises a processor module, the learning / processing module, an Ethernet interface module, an extraction module, a data buffer module, the NAT processing module and an NAT inverse processing module. According to the NAT realization method and apparatus disclosed by the invention, NAT processing is realized based on SOPC, the respective advantages of the processor and logic processing are fully used, the respective realization functions are reasonably distributed, and the learning / processing module is used for compensating the shortcomings of the processing ability of the processor module; and moreover, the NAT realization method and apparatus further have the advantages of flexible NAT processing, high processing speed, low cost and low power consumption, and has good economic and social benefits. The NAT realization method and apparatus disclosed by the invention can be widely applied to various NAT processing systems.
Description
technical field [0001] The invention relates to the field of computer networks, in particular to a network address conversion method. Background technique [0002] NAT: NetworkAddressTranslation, Network Address Translation. [0003] SOPC: System-on-Programmable-Chip, can be programmed on a chip system. [0004] ICMP: InternetControlMessageProtocol, Internet Control Message Protocol. It is a sub-protocol of the TCP / IP protocol family and is used to transmit control messages between IP hosts and routers. [0005] CAM: ContentAddressableMemory, content addressable memory. [0006] At present, there are mainly three methods to implement NAT. The first is pure software implementation, and the carrier is usually a general-purpose CPU; the second is based on FPGA hardware; the third is based on a network processor (NP). [0007] The method implemented by pure software is flexible in processing mode and mature in technology, but its disadvantages are also obvious, such as slow ...
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IPC IPC(8): H04L29/12
CPCH04L61/2514Y02D30/50H04L61/00
Inventor 刘兆先
Owner BEIJING TELIXIN ELECTRONICS TECH