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Active power filter control system and method based on FPGA

A technology of power filter and control system, which is applied in active power filter and AC network to reduce harmonics/ripples, etc. It can solve the problems of long time delay of the control system, low device capacity, poor compensation effect, etc., and achieve compensation The effect is good, the device capacity is increased, and the delay is shortened

Inactive Publication Date: 2016-02-17
NANJING APAITEK TECH
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AI Technical Summary

Problems solved by technology

However, the current APF still has many deficiencies and defects when compensating the power quality of the grid, such as low device capacity, long delay of the control system, low compensation accuracy, poor compensation effect, etc.

Method used

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  • Active power filter control system and method based on FPGA
  • Active power filter control system and method based on FPGA
  • Active power filter control system and method based on FPGA

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Embodiment Construction

[0023] Such as Figure 1-6 As shown, the present invention discloses an FPGA-based active power filter control system, including: a control unit, a logic protection unit, a display unit, and a PWM unit. The control unit, logic protection unit, display unit, and PWM unit are highly integrated On the FPGA chip.

[0024] The control unit is responsible for extracting harmonic currents and tracking instructions through the control algorithm; the logic protection unit is responsible for starting and stopping of the equipment, and protection functions; the display unit is responsible for the display and monitoring of electrical quantities; the PWM unit is responsible for controlling the switching of IGBTs.

[0025] An active power filter control method based on FPGA includes the following steps:

[0026] Step 1. Detect system current, system voltage, output current: realize digital sampling value calculation and deviation correction through the AD sampling control program built in FPGA;

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PUM

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Abstract

The invention provides an active power filter control system based on FPGA. The active power filter control system based on FPGA comprises a control unit, a logic protection unit, a display unit and a PWM unit, wherein the control unit, the logic protection unit, the display unit and the PWM unit are highly integrated on an FPGA chip. The active power filter control system based on FPGA can improve the installed capacity and reduce the delay of a control system, and is high in compensation precision and is favorable in compensation effect.

Description

Technical field [0001] The invention relates to a power filter control system, in particular to an active power filter control system based on FPGA. Background technique [0002] In the process of social development, people have higher and higher requirements for power demand, especially power quality. However, due to the large-scale use of nonlinear loads, serious power harmonic pollution has been brought about, which has a serious impact on the safe, stable and efficient operation of the power system, and causes harm to the power supply equipment. How to minimize the harm caused by harmonics is an issue of great concern in the field of power systems. An important trend of harmonic suppression is to use active power filter (ActivePowerFilter abbreviated as APF) technology to suppress harmonics. However, the current APF still has many shortcomings and deficiencies when compensating the power quality of the power grid, such as low device capacity, long control system delay, low ...

Claims

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Application Information

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IPC IPC(8): H02J3/01
CPCY02E40/20
Inventor 刘明张明仇志凌李锦葛文海
Owner NANJING APAITEK TECH
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