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Delay-locked loop

A delay-locked loop and delay circuit technology, applied in the direction of automatic power control, pulse processing, electrical components, etc., can solve the problems of frequency signal manufacturing process or temperature effects, integrated circuits cannot work normally, etc., to save circuit area and power. Effects of Consumption, Large Delay, Precise Delay Effects

Active Publication Date: 2016-02-17
VIA ALLIANCE SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the frequency signal is easily affected by the manufacturing process or temperature
When the frequency signal deviates, it will cause the integrated circuit to fail to work normally

Method used

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  • Delay-locked loop
  • Delay-locked loop
  • Delay-locked loop

Examples

Experimental program
Comparison scheme
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Embodiment Construction

[0022] Figure 1A It is an embodiment of the delay locked loop of the present invention. As shown in the figure, the delay locked loop 100A includes a delay unit 110, a removal unit 120, a phase detection unit 130, and a control unit 140. The delay unit 110 has a delay coefficient, and delays the first frequency signal according to the delay coefficient to generate a second frequency signal. In this embodiment, the delay unit 110 responds to the input frequency signal CLK IN Delay to generate frequency signal CLK DL . The invention does not limit the internal circuit structure of the delay unit 110. Any circuit with a programmable delay function can be used as the delay unit 110.

[0023] Frequency signal CLK DL And input frequency signal CLK IN The delay time between is determined by the delay coefficient of the delay unit 110. For example, when the delay coefficient is greater, the frequency signal CLK DL And input frequency signal CLK IN The longer the delay time betwe...

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PUM

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Abstract

A delay-locked loop comprises a delay unit, a removal unit and a control unit. The delay unit has a delay coefficient and conducts delay on a first frequency signal according to the delay coefficient to produce a second frequency signal. The removal unit conducts delay on a third frequency signal to produce a fourth frequency signal. A phase detection unit is coupled with the delay unit and the removal unit. The phase detection unit produces an indication signal according to a phase difference of the second frequency signal and the fourth frequency signal. The control unit is coupled with the phase detection unit, and the control unit adjusts the delay coefficient according to the indication signal, wherein the control unit detects the duration time of the indication signal maintained at a first electrical potential; when the duration time does not reach a preset value, and the indication signal maintains at a second electrical potential, the control unit increases the delay coefficient; when the duration time reaches the preset value, and the indication signal maintains at the second electrical potential, the control unit decreases the delay coefficient.

Description

Technical field [0001] The invention relates to an electronic circuit, in particular to a delay locked loop. Background technique [0002] With the advancement of technology, more and more circuits are integrated in the same integrated circuit. Each circuit in an integrated circuit operates according to a frequency signal. However, the frequency signal is easily affected by the manufacturing process or temperature. When the frequency signal shifts, the integrated circuit will not work normally. Summary of the invention [0003] In view of this, the purpose of the present invention is to provide a delay locked loop, including: a delay unit, a removal unit, and a control unit. The delay unit has a delay coefficient and delays the first frequency signal according to the delay coefficient to generate a second frequency signal. The removing unit delays the third frequency signal to generate a fourth frequency signal. The phase detection unit is coupled with the delay unit and the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03L7/08
CPCH03L7/08H03L7/081H03L7/089H03K5/134H03K2005/00019H03L7/085
Inventor 司强姜凡
Owner VIA ALLIANCE SEMICON CO LTD