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Activation Treatments in Plating Processes

A technology of activation treatment and electroplating process, applied in circuits, electrical components, electrical solid devices, etc., can solve the problems of rough interface between electroplating layers, performance degradation, reliability degradation, etc., and achieve interface improvement, performance improvement, and void reduction. Effect

Inactive Publication Date: 2016-03-02
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] It was found that the interface between the electroplating layers is rough and voids are formed therein, which degrades the electro-migration (EM) performance of the bump, thereby reducing its reliability

Method used

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  • Activation Treatments in Plating Processes
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  • Activation Treatments in Plating Processes

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Embodiment Construction

[0027] The making and using of embodiments of the invention are described in detail below. It should be understood that many inventive concepts provided by these embodiments can be widely applied to various specific fields. The specific embodiments described are by way of illustration only and are not intended to be limiting.

[0028] In one embodiment, a novel process for forming an integrated circuit is provided. Intermediate stages in the manufacture of this embodiment are shown. Various embodiments are discussed in this disclosure. In different drawings and embodiments, similar reference numerals will be used to refer to similar elements.

[0029] refer to figure 1 , a wafer 2 comprising a substrate 10 is provided. The substrate 10 may be a semiconductor substrate such as a bulk silicon substrate, but may also include other semiconductor materials such as silicon germanium, silicon carbide, gallium arsenide, and the like. Semiconductor devices 14 such as transistors...

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Abstract

A method of forming a device includes performing a first plating process to form a first metallic feature, and performing an activation treatment to a surface of the first metallic feature in an activation treatment solution, wherein the activation treatment solution includes a treatment agent in de-ionized (DI) water. After the step of performing the activation treatment, performing a second plating process to form a second metallic feature and contacting the surface of the first metallic feature. According to the invention, interfaces among all layers are remarkably improved; gaps which can be observed are remarkably reduced; and the interfaces become smoother. Thus, compared with the traditional method in which a metal projection which is formed via a quick dump rinse tank (QDR) in the electroplating technology, the performance of electro-migration (EM) of the metal projection obtained in the invention is improved, and reliability of the metal projection is improved.

Description

[0001] This application is a divisional application of an invention patent application with an application date of November 4, 2010, an application number of 201010537792.8, a priority date of May 20, 2010, and an invention title of "Activation Treatment in Electroplating Process". technical field [0002] The invention relates to an integrated circuit, in particular to an electroplating process, and more to a process for forming bumps by the electroplating process. Background technique [0003] When forming a semiconductor chip, integrated circuit devices such as transistors are first formed on the surface of a semiconductor substrate in the semiconductor chip. An interconnection structure is then formed on the integrated circuit device. Bumps are formed on the surface of the semiconductor chip as contacts of integrated circuit devices. [0004] In a specific process for forming bumps, an under-bump metallurgy (UBM) is formed first, and then a bump is formed on the UBM. T...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/60C25D7/12
CPCC25D7/123H01L24/11H01L24/13H01L24/03H01L24/05H01L2224/13118H01L2224/13139H01L2224/13083H01L2224/11901H01L2224/11622H01L2224/1181H01L2224/11464H01L2224/11462H01L2224/11424H01L2224/05639H01L2224/05647H01L2224/05644H01L2224/05624H01L2224/05572H01L2224/05181H01L2224/05166H01L2224/0401H01L2224/03831H01L2224/0345H01L2224/13147H01L2224/13155H01L2924/10329H01L2924/014H01L2924/01322H01L2924/01327H01L2924/01082H01L2924/01079H01L2924/01073H01L2924/01074H01L2924/01072H01L2924/01047H01L2924/01029H01L2924/0103H01L2924/01032H01L2924/01033H01L2924/01013H01L2924/01006H01L2924/0002H01L2924/00013H01L2224/93H01L2224/11H01L2224/13099H01L2224/13599H01L2224/05599H01L2224/05099H01L2224/29099H01L2224/29599H01L2224/05552H01L2924/14H01L2224/1308H01L2924/00H01L2224/1146H01L21/288
Inventor 林志伟郑明达何明哲刘重希
Owner TAIWAN SEMICON MFG CO LTD