Semiconductor device and method for manufacturing same

Abstract

The invention discloses a structure of a semiconductor device and a method for manufacturing a semiconductor device. The method includes the following steps of: providing a semiconductor substrate; forming a first semiconductor layer on part of the substrate, and forming a second semiconductor layer on the substrate and the first semiconductor layer, wherein isolation is formed on the substrate, the first semiconductor layer includes a first part which is positioned in part of an active area and a second part which extends toward a gate end, the first part and the active area have the same width in the gate width direction, and the width of the first part is greater than or equal to the gate length in the gate length direction; forming a device structure on the active area of the second semiconductor layer, wherein a gate of the device structure is positioned on the first part; forming through etching holes on the second semiconductor layer on the second part; etching and removing the first semiconductor layer through the etching holes to form a cavity; and forming a dielectric layer on the inner surfaces of the cavity and the etching holes, and adding conductor layers into the cavity and the etching holes. According to the method, through the back gate formed by adding the dielectric layer and the conductor layers into the cavity and the etching holes, the threshold voltage of the device can be adjusted, and the process is simple and is easy to operate.

Description

technical field [0001] The invention belongs to the field of semiconductor manufacturing, and in particular relates to a semiconductor device and a manufacturing method thereof. Background technique [0002] With the continuous reduction of the feature size of the device, after entering the nanometer scale, especially the size below 22nm, the problems close to the limit of semiconductor physical devices come one after another, such as capacitance loss, leakage current increase, noise promotion, latch-up effect and short channel In order to overcome these problems, SOI (Silicon-On-Insulator, Silicon-On-Insulator) technology came into being. [0003] The SOI substrate is divided into thick layer and thin layer SOI. The thickness of the top layer silicon of the thin layer SOI device is smaller than the width of the maximum depletion layer under the gate. When the thickness of the top layer silicon becomes thinner, the device is partially depleted (PartiallyDepletion) to fully d...

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Problems solved by technology

[0004] However, the current cost of SOI substrates is relatively high, and the specifications of the provided SOI substrates are relatively simple, so it is impossible to adjust the thickness of each layer according to the needs of the device.

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