A kind of semiconductor device and its manufacturing method

Abstract

A structure and manufacturing method of a semiconductor device, comprising: providing a semiconductor substrate; forming a first semiconductor layer on part of the substrate, forming a second semiconductor layer on the substrate and the first semiconductor layer, and forming isolation on the substrate, wherein , the first semiconductor layer includes a first part located in part of the active region and a second part extending toward the end of the gate, the first part is as wide as the active region in the gate width direction and has a width greater than or equal to the gate length direction Long; form a device structure on the active region of the second semiconductor layer, the gate of the device structure is located above the first part; form a through etching hole in the second semiconductor layer above the second part; through the etching hole Etching and removing the first semiconductor layer to form a cavity; forming a dielectric layer on the inner surface of the cavity and the etching hole, and filling the cavity and the etching hole with the conductor layer. The invention can form the back gate structure by filling the dielectric layer and the conductor layer in the cavity and the etching hole, realize the adjustment of the threshold voltage of the device, and the process is simple and easy.

Description

technical field [0001] The invention belongs to the field of semiconductor manufacturing, and in particular relates to a semiconductor device and a manufacturing method thereof. Background technique [0002] With the continuous reduction of the feature size of the device, after entering the nanometer scale, especially the size below 22nm, the problems close to the limit of semiconductor physical devices come one after another, such as capacitance loss, leakage current increase, noise promotion, latch-up effect and short channel In order to overcome these problems, SOI (Silicon-On-Insulator, Silicon-On-Insulator) technology came into being. [0003] The SOI substrate is divided into thick layer and thin layer SOI. The thickness of the top layer silicon of the thin layer SOI device is smaller than the width of the maximum depletion layer under the gate. When the thickness of the top layer silicon becomes thinner, the device changes from partially depleted (Partially Depletion)...

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Problems solved by technology

[0004] However, the current cost of SOI substrates is relatively high, and the specifications of the provided SOI substrates are relatively simple, so it is impossible to adjust the thickness of each layer according to the needs of the device.

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