Semiconductor device and manufacturing method

Abstract

The invention discloses a semiconductor device and a manufacturing method. The manufacturing method comprises the steps of providing a semiconductor substrate; forming a laminated layer of a first semiconductor layer and a second semiconductor layer, and forming an isolating structure of the laminated layer in the substrate; forming a device structure on the second semiconductor layer; etching the second semiconductor layer on the two sides of the device to form etching holes; performing etching through the etching holes to remove at least the first semiconductor layer below a grid electrode of the device structure to form a cavity; and forming a dielectric layer on the inner surfaces of the cavity and the etching holes, and filling the cavity and the etching holes with a conductor layer. An SOI (silicon-on-insulator) device can be realized through the substrate; the dielectric layer is formed in the cavity and the etching hole, and the cavity and the etching hole are filled with the conductor layer to be used as back gates, so that regulation on the threshold value voltage of the device is realized; and in addition, the manufacturing process is simple and easy to implement.

Description

technical field [0001] The invention belongs to the field of semiconductor manufacturing, and in particular relates to a semiconductor device and a manufacturing method thereof. Background technique [0002] With the continuous reduction of the feature size of the device, after entering the nanometer scale, especially the size below 22nm, the problems close to the limit of semiconductor physical devices come one after another, such as capacitance loss, leakage current increase, noise promotion, latch-up effect and short channel In order to overcome these problems, SOI (Silicon-On-Insulator, Silicon-On-Insulator) technology came into being. [0003] The SOI substrate is divided into thick layer and thin layer SOI. The thickness of the top layer silicon of the thin layer SOI device is smaller than the width of the maximum depletion layer under the gate. When the thickness of the top layer silicon becomes thinner, the device is partially depleted (PartiallyDepletion) to fully d...

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Problems solved by technology

[0004] However, the current cost of SOI substrates is relatively high, and the specifications of the provided SOI substrates are relatively simple, so it is impossible to adjust the thickness of each layer according to the needs of the device.

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