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Processing layer data packet generation method, device and pci Express system

A technology for generating devices and data packets, applied in electrical digital data processing, instruments, etc., can solve problems such as increasing TLP transmission delay, achieve the effects of reducing circuit resource overhead, ensuring transmission bandwidth, and reducing transmission delay

Active Publication Date: 2018-08-21
SHENZHEN PANGO MICROSYST CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The present invention provides a processing layer data packet generation method, device and PCIExpress for PCI Express system, to solve the existing TLP generation method needs to increase the TLP transmission delay caused by the shift operation at the data link layer and the physical layer The problem

Method used

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  • Processing layer data packet generation method, device and pci Express system
  • Processing layer data packet generation method, device and pci Express system
  • Processing layer data packet generation method, device and pci Express system

Examples

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Comparison scheme
Effect test

no. 1 example

[0029] figure 2 A schematic structural diagram of the TLP generation device provided in the first embodiment of the present invention, consisting of figure 2 It can be seen that in this embodiment, the TLP generation device 2 provided by the present invention includes:

[0030] The reservation module 21 is used to control the processing layer to generate an initial TLP. The initial TLP includes a reserved field, a header field, a data field and a summary field, and the reserved field includes a blank start flag field, a sequence number field, an LCRC field, and an end flag field ;

[0031] The control module 22 is configured to control data link layer and physical layer calculations and fill in reserved fields to generate a final TLP.

[0032] In some embodiments, the control module 22 in the above embodiments is used to control the physical layer to fill in the start flag field and the end flag field, control the data link layer to fill in the sequence number field, and c...

no. 2 example

[0039] image 3 The flow chart of the TLP generation method that the second embodiment of the present invention provides, by image 3 It can be seen that, in this embodiment, the TLP generation method provided by the present invention includes the following steps:

[0040] S301: The control processing layer generates an initial TLP. The initial TLP includes a reserved field, a header field, a data field, and a summary field. The reserved field includes a blank start flag field, a sequence number field, an LCRC field, and an end flag field;

[0041] S302: Control the data link layer and the physical layer to calculate and fill in reserved fields to generate a final TLP.

[0042] In some embodiments, calculating and filling in the reserved fields in the foregoing embodiments to generate the final TLP includes: controlling the physical layer to determine and fill in the start flag field and the end flag field, controlling the data link layer to determine and fill in the sequence...

no. 3 example

[0052] The LCRC value of the TLP in the existing PCI Express is added to the end mark of the TLP after the calculation of the LCRC circuit is completed, and the TLP shift alignment operation needs to be performed in this way, which will increase the transmission delay of the TLP; in the existing PCI Express When the LCRC circuit in PCI Express processes back-to-back TLP, two same LCRC circuits are used for calculation, and the resource overhead of the LCRC circuit is very large; when the LCRC circuit in the existing PCI Express processes back-to-back TLP, the internal data bit width is large, such as 128bit bit width , there is no published solution for the LCRC circuit.

[0053] In order to solve the above problems, the present embodiment reserves the position of the LCRC value and other additional values ​​in the TLP in advance when processing the layer package TLP. Since the bit width of the TLP start mark and the TLP end mark are not fixed, the LCRC circuit needs It consis...

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Abstract

The present invention provides a processing layer data packet generation method and apparatus, and a PCI Express system. The method comprises: controlling a processing layer to generate an initial TLP, wherein the initial TLP comprises a reservation field, a head field, a data field and an abstract field, and the reservation field comprises a blank start flag field, a sequence number field, an LCRC field and an end flag field; and controlling a data link layer and a physical layer to calculate and fill the reservation field, and generating a final TLP. By implementing the method provided by the present invention, in a process of generating the TLP, transmission latency of the TLP is reduced because the TLP does not need to be shifted.

Description

technical field [0001] The invention relates to the field of high-speed serial buses, in particular to a processing layer data packet generation method and device for a PCI Express (Peripheral Component Interconnect Express, high-speed external device interconnection bus) system, and the PCI Express. Background technique [0002] PCI Express technology is the third-generation high-performance I / O bus technology proposed to adapt to the development of computer technology. The software framework of PCI Express technology is fully compatible with the software framework of PCI (Peripheral Component Interconnect, external device interconnection bus) technology , Unlike PCI technology that uses parallel data transmission, PCI Express technology uses serial data transmission. [0003] The PCI Express protocol stipulates that PCI Express consists of a physical layer, a data link layer, and a processing layer; the processing layer mainly realizes the packaging and unpacking of TLP (T...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/38G06F13/42
CPCG06F13/385G06F13/4221G06F2213/0026
Inventor 刘应
Owner SHENZHEN PANGO MICROSYST CO LTD
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