Frame sequence processing method and system

Abstract

The invention discloses a frame sequence processing method. The method comprises the steps of adding a pre-designed key command word for configuration data stored in an external storage device, and performing data frame segmentation on the configuration data added with the key command word; and when an anti-fuse FPGA detects that a data value of the configuration data output by the external storage device does not meet a preset output condition, processing all segments of data frames in sequence according to the key command word in the configuration data so as to determine an abnormal data frame. By applying the frame sequence processing method provided by the invention, the anti-fuse FPGA processes the configuration data stored in the external storage device by taking a data frame as a unit; and compared with the prior art of reading configuration data in the whole chip, the method has the advantages that based on finite resource capacity of the anti-fuse FPGA, the resource capacity demand is reduced to a very great extent, the resource space occupation is reduced, and the data processing speed is greatly increased.

Description

technical field [0001] The present invention relates to the communication field, in particular to a frame sequence processing method and system. Background technique [0002] SRAM-type FPGAs are more and more widely used in space electronic products. However, under the influence of electromagnetic radiation in the space environment, when SRAM-based configuration units are hit by rays, data "flipping" may occur, causing FPGA programs to run incorrectly, resulting in serious or even catastrophic consequences. [0003] Anti-fuse FPGAs are not affected by electromagnetic radiation due to their internal interconnection structure being radiation-proof. At present, all the configuration data of the SRAM type FPGA chip is generally read back through the anti-fuse FPGA, and the data that has been "flipped" is determined by checking and comparing the configuration data, and the data is corrected. [0004] The inventor found through many experiments and researches that antifuse FPGAs...

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Problems solved by technology

[0004] The inventor found through many experiments and researches that antifuse FPGA has small resource capacity due to process limitations, and reading back all the configuration data of the entire chip of SRAM FPGA will occupy a large amount of resource space, resulting in slow data processing

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