Timing method and apparatus

Abstract

The invention provides a timing method and apparatus. The method comprises steps of counting a basic clock via Gray codes to acquire Gray code counts and output the same, and conducting phase shift to lowest order output in the Gray code counts to achieve an m way sub-clock. A phase shift (phi) between each way sub-clock and the lowest order output meets a formula of (phi)=n x a and phi does not equal 90 degrees; 180 degrees can be exactly divided by a; n is an integer and greater than zero and less than (180-degree / a); if 90 degrees can be exactly divided by a, m=180 / a-2; if 90 degrees cannot be exactly divided by a, m=180 / a-1; when a preset event happens, a timing result for the preset event can be achieved via the Gray code count output value, m way sub-clock output, a period of the basic clock and a; therefore, counting unit numbers can be reduced; time hopping can be avoided for m way sub-clock output and Gray code count output, so timing accuracy is improved.

Description

technical field [0001] The invention relates to the field of electronic technology, in particular to a timing method and device. Background technique [0002] In many electronic systems, predetermined events need to be timed, and the resulting timing may affect the output of the system. For example, in a PET (Positron Emission Computed Tomography, Positron Emission Computed Tomography) system, it is necessary to time the time when two photons reach the detector, and determine whether it is a coincidence event according to the timing result, so as to generate the final PET image according to the coincidence event. [0003] see figure 1 , a commonly used timing process includes: the clock input unit outputs the basic clock, and the basic clock is shifted by multiple sub-clock units to obtain multiple sub-clocks. The phase difference between adjacent sub-clocks is the same, and each counting unit corresponds to a A sub-clock unit and a latch unit, each counting unit counts th...

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Problems solved by technology

[0004] Obviously, in the above-mentioned timing method, since each sub-clock unit corresponds to a counting unit, for example, when there are 20 sub-clock units, at least 20 counting units are required, resulting in a large number of counting units, which leads to a shortage of hardware resources. waste

Moreover, since the counting unit uses binary counting, multiple outputs of the counting results may jump simultaneously, resulting in inaccurate counting results of the latch, thereby affecting the accuracy of timing

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