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Non-standard PCIe3.0 interface test method and system
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An interface test, pcie3.0 technology, applied in the field of signal integrity verification, can solve the problem of no signal verification scheme
Inactive Publication Date: 2016-07-06
INSPUR BEIJING ELECTRONICS INFORMATION IND
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Abstract
Description
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Problems solved by technology
For non-standard PCIe3.0 cards, there is also no complete set of signalverification solutions
Method used
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Embodiment 1
[0048] The invention provides a non-standard PCIe3.0 interface testing method, comprising:
[0049] The PCIe3.0 interface of the motherboard to be tested is tested for transmitting performance and receiving performance respectively;
[0050] When both the transmitting performance test and the receiving performance test pass, it is determined that the PCIe3.0 interface of the motherboard to be tested passes the test;
[0051] The emission performance test of the PCIe3.0 interface of the motherboard under test includes:
[0052] Obtain the storage waveform of the PCIe3.0 interface of the motherboard to be tested;
[0053] Analyzing the transmit signal and the reference clock signal according to the stored waveform to obtain an eye diagram;
[0054] Judging whether to pass the emission performance test according to the eye diagram;
[0055] The Kesight oscilloscope can be used to capture the stored waveform, and the SigTest software can be used to adopt a dual-port test method...
Embodiment 2
[0064] This embodiment corresponds to Embodiment 1. After determining that the PCIe3.0 interface of the motherboard to be tested has passed the test, it may also include:
[0065] To test non-standard PCIe3.0 plug-in cards, the non-standard PCIe3.0 test fixture needs to simultaneously lead out the data Tx and Rx signals of PCIe3.0, as well as the data reference clock signal, and include the S parameter measurement point of the fixture. The test method is as follows: :
[0066] Obtain the S parameter of the non-standard test fixture and the S parameter of the non-standard PCIe3.0 plug-in card;
[0067] Judging whether the S parameter of the non-standard PCIe3.0 plug-in card is greater than the S parameter of the non-standard test fixture, if yes, then determining that the non-standard PCIe3.0 plug-in card passes the test.
[0068] By measuring the S-parameter measurement points on the non-standard test fixture, the S-parameters of the non-standard PCIe3.0 test fixture can be o...
Embodiment 3
[0070] The present invention also provides a non-standard PCIe3.0 interface test system, figure 1 A schematic structural diagram of Embodiment 3 of a non-standard PCIe3.0 interface test system of the present invention is shown, including:
[0071] The main board test module 101 is used to perform a transmission performance test and a reception performance test on the PCIe3.0 interface of the main board to be tested respectively;
[0072] Judgment module 102, used for determining that the PCIe3.0 interface of the mainboard to be tested passes the test when the transmitting performance test and the receiving performance test pass;
[0073] The motherboard test module 101 includes a transmission performance test submodule 201 and a reception performance test submodule 202;
[0074] The launch performance test submodule is used for:
[0075] Obtain the storage waveform of the PCIe3.0 interface of the motherboard to be tested;
[0076] Analyzing the transmit signal and the refer...
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Abstract
The invention discloses a non-standard PCIe3.0 interface test method and system. The method comprises following steps of carrying out a transmitting performance test and a receiving performance test to a to-be-tested main board PCIe3.0 interface, thus obtaining storage waveforms of the to-be-tested main board PCIe3.0 interface; analyzing transmitting signals and reference clock signals according to the storage waveforms, thus obtaining an eye diagram; judging whether the transmitting performance test is passed or not according to the eye diagrams; enabling a CPU to enter into a Loopback mode; adding preset dithering signals in the receiving signals of the CPU; obtaining the transmitting signals of the transmitting end of the CPU; calculating a bit error rate according to the transmitting signals of the CPU and the receiving signals of the CPU; judging whether the bit error rate is less than a preset bit error rate threshold value or not; if the error rate is less than the preset bit error rate threshold value, determining that the receiving performance test is passed; and when the transmitting performance test and the receiving performance test are all passed, determining that the to-be-tested main board PCIe3.0 interface passes the test. According to the method and the system, the transmitting signal quality and the receiving performance of the non-standard PCIe3.0 interface can be effectively tested.
Description
technical field [0001] The invention relates to the field of signal integrity verification, in particular to a non-standard PCIe interface testing method and system. Background technique [0002] Currently, standard PCIe 3.0 interfaces with X1, X4, X8, and X16 widths are commonly used in the industry. Moreover, the PCIe Association has strict requirements on the pin definition, test process and test specifications of the standard PCIe3.0 interface on the motherboard. At the same time, the production and verification of standard PCIe3.0 plug-in cards also need to meet the requirements of the PCIe Association. In this way, it can be guaranteed that any standard PCIe 3.0 plug-in card can be used normally when plugged into the standard PCIe 3.0 interface of any motherboard. [0003] However, the PCIe Association has not made a clear pin definition for the non-standard PCIe 3.0 interface, and each company may have different pin definitions for the same type of non-standard PCIe...
Claims
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Application Information
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