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Array substrate motherboard, manufacturing method thereof, and display device

A technology of an array substrate and a manufacturing method, applied in the field of display, can solve the problems of easy occurrence of depressions, uneven display products, uneven diffusion of alignment films, etc., so as to achieve the effect of improving the diffusion effect and avoiding poor Mura.

Active Publication Date: 2018-12-18
BOE TECH GRP CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] For 43-inch ADS (Advanced Hyper-Dimension Switching) display products and 18.5-inch HADS (High Aperture Ratio Advanced Hyper-Dimension Switching) display products, the deep hole density of 43-inch ADS display products is less than that of 18.5-inch HADS display products The deep hole density of the product, wherein, the deep hole is a via hole that penetrates at least two layers of insulating layers. Since the deep hole is prone to depression, when the alignment film is coated on the array substrate of the MMG product, the alignment film is easy to be in the deep hole. Diffusion is prone to unevenness, resulting in the problem of display Mura (unevenness) in the final display product

Method used

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  • Array substrate motherboard, manufacturing method thereof, and display device
  • Array substrate motherboard, manufacturing method thereof, and display device
  • Array substrate motherboard, manufacturing method thereof, and display device

Examples

Experimental program
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Effect test

Embodiment 1

[0068] This embodiment provides a method for manufacturing an array substrate mother board, which at least includes forming a film layer pattern of a first display product on a first area of ​​the base substrate and forming a film layer of a second display product on a second area of ​​the base substrate Graphics, the deep hole density of the first display product is greater than the deep hole density of the second display product, and the deep holes are via holes penetrating through at least two insulating layers. The manufacturing method includes:

[0069] Before forming the second conductive pattern on the insulating layer, the thickness of the insulating layer in the first region is reduced, and the second conductive pattern is connected to the first conductive pattern under the insulating layer through the via hole structure penetrating through the insulating layer. Graphical connections.

[0070] In this embodiment, when forming the film pattern of different display prod...

Embodiment 2

[0103] This embodiment provides an array substrate motherboard. The array substrate motherboard at least includes the film layer pattern of the first display product formed on the first area of ​​the base substrate and the second display pattern formed on the second area of ​​the base substrate. The film layer pattern of the product, the deep hole density of the first display product is greater than the deep hole density of the second display product, the deep holes are via holes penetrating through at least two insulating layers, and the array substrate includes The first conductive pattern and the second conductive pattern on the insulating layer, the second conductive pattern is connected to the first conductive pattern through the via structure through the insulating layer, wherein all the first regions The thickness of the insulating layer is smaller than the thickness of the insulating layer in the second region.

[0104] In this embodiment, when the film layer patterns ...

Embodiment 3

[0117] This embodiment provides a display device, including the above-mentioned first region. The display device may be any product or component with a display function such as a liquid crystal panel, a liquid crystal TV, a liquid crystal display, a digital photo frame, a mobile phone, a tablet computer, a navigator, and an electronic paper.

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PUM

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Abstract

The invention provides an array substrate motherboard, a manufacturing method thereof, and a display device, which belong to the field of display technology. Wherein, the manufacturing method of the array substrate mother board includes at least forming the film layer pattern of the first display product on the first area of ​​the base substrate and forming the film layer pattern of the second display product on the second area of ​​the base substrate, said The deep hole density of the first display product is greater than the deep hole density of the second display product, and the deep holes are via holes penetrating through at least two insulating layers. The manufacturing method includes: before forming the second conductive pattern on the insulating layer, The thickness of the insulating layer in the first region is reduced, and the second conductive pattern is connected to the first conductive pattern under the insulating layer through a via structure penetrating through the insulating layer. Through the technical scheme of the present invention, mura defects can be avoided when forming film patterns of different display products on the array substrate.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate motherboard, a manufacturing method thereof, and a display device. Background technique [0002] MMG (Multi Mode Group, multi-display mode group) product is to form two or more graphics of display products on the same substrate at the same time, which can improve the utilization rate of the substrate and reduce the input cost. Currently as figure 1 The 43MMG product shown has been mass-produced. The 43MMG product forms the graphics of a 43-inch ADS display product and an 18.5-inch HADS display product on the same substrate. [0003] For 43-inch ADS (Advanced Hyper-Dimension Switching) display products and 18.5-inch HADS (High Aperture Ratio Advanced Hyper-Dimension Switching) display products, the deep hole density of 43-inch ADS display products is less than that of 18.5-inch HADS display products The deep hole density of the product, wherein, the d...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/12H01L21/77
CPCH01L27/1214H01L27/1259H01L27/1248H01L27/1288G02F1/136227G03F7/0037G02F1/136236G02F1/136295G02F1/134363G02F1/13439G02F1/136286G02F1/1368G02F2201/121G02F2201/123G03F7/038G03F7/039G03F7/16G03F7/20G03F7/32H01L21/0274H01L27/124H01L27/1262
Inventor 王静郭会斌丁向前白金超刘耀
Owner BOE TECH GRP CO LTD