A sealing ring for a chip

A sealing ring and chip technology, which is applied in semiconductor/solid-state device components, semiconductor devices, electrical components, etc., can solve the problem of chip edge delamination and other problems, and achieve the effect of preventing chip edge delamination and increasing deformation ability

Active Publication Date: 2019-01-29
SEMICON MFG INT (SHANGHAI) CORP
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of this application is to provide a chip sealing ring to solve the problem of easy delamination of the edge of the chip in the scribing process of the prior art

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A sealing ring for a chip
  • A sealing ring for a chip
  • A sealing ring for a chip

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0038] It should be noted that the following detailed description is exemplary and intended to provide further explanation of the application. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0039] It should be noted that the terminology used herein is for the purpose of describing specific embodiments only, and is not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly dictates otherwise, the singular is intended to include the plural as well, furthermore, it should also be understood that when used in this specification of "comprising" and / or "comprising", it indicates There are features, steps, operations, devices, components and / or combinations thereof.

[0040] For ease of description, spatially relative terms, such as "on", "over", "on the surface", "above",...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

PropertyMeasurementUnit
diameteraaaaaaaaaa
Login to view more

Abstract

The invention provides a sealing ring of a chip. The sealing ring comprises one or more sealing units; each sealing unit comprises a first metal wiring layer, a second metal wiring layer, an interlayer dielectric layer, and one or more via hole groups; the first metal wiring layer surrounds the chip; the first metal wiring layer includes a first metal portion and a first dielectric material portion which are insulated from each other; the second metal wiring layer is opposite to the first metal wiring layer; the second metal wiring layer includes a second metal portion and a second dielectric material portion which are insulated from each other; the interlayer dielectric layer is arranged between the first metal wiring layer and the second metal wiring layer; the one or more via hole groups surround the chip, are arranged in the interlayer dielectric layer and are connected with the first metal portion and the second metal portion; and each via hole group includes a plurality of via holes which are independent from each other. A via hole formation mechanical stress breaks through the obstruction of an adhesion force between the first metal portion, the second metal portion and the via holes, so that the problem of delamination of the edge of the chip can be alleviated; and the rigidness of the via holes is decreased, so that the deformation ability of the via holes can be increased, and therefore, the delamination of the edge of the chip can be effectively prevented.

Description

technical field [0001] The present application relates to the technical field of semiconductor manufacturing, and in particular, to a sealing ring for a chip. Background technique [0002] In the semiconductor manufacturing process, a semiconductor chip including a semiconductor active device and an interconnection structure disposed on the device can be formed on a semiconductor substrate through processes such as photolithography, etching, and deposition. Usually, a plurality of chips can be formed on a wafer, and finally these chips are cut off from the wafer, and a packaging process is performed to form an integrated circuit area. In the process of dicing the chip, the stress generated by the dicing knife can damage the edge of the chip, and even cause the chip to collapse. In the prior art, in order to prevent the chip from being damaged during dicing, a sealing ring is arranged around the active device area of ​​the chip. The ring can block chemical damage caused by ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/528H01L23/02
Inventor 张贺丰侯大维
Owner SEMICON MFG INT (SHANGHAI) CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap