LIN bus decoding, triggering and analyzing technology

A bus and decoder technology, applied in the field of LIN bus decoding, triggering and analysis, can solve the problems of slow decoding speed and poor real-time performance of LIN bus, and achieve the effect of low cost, small dead time and strong real-time performance

Inactive Publication Date: 2016-10-12
THE 41ST INST OF CHINA ELECTRONICS TECH GRP
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Aiming at the problems of slow decoding speed and poor real-time performance of the existing LIN bus, the present invention provides a method for decoding, triggering and analyzing the LIN bus

Method used

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  • LIN bus decoding, triggering and analyzing technology
  • LIN bus decoding, triggering and analyzing technology
  • LIN bus decoding, triggering and analyzing technology

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0054] The state machine of LIN bus decoding works as follows:

[0055] State 0: Bus idle state, used to reset the state machine and clear the values ​​of all counters. If it detects that the value of DEC_LIN is 1 (that is, the current bus level is in the recessive level, the same below), the state machine will jump to state 1; if it detects that the value of DEC_LIN is 0 (that is, the current bus level is in the level, the same below), the state machine will always remain in state 0.

[0056] State 1: "beginning of quasi-synchronous interval" extraction state, when the state machine jumps from state 0 to state 1, the decoding module will send out the flag of "beginning of similar synchronous interval". In the current state, the decoding module will continuously collect 13 bits, and perform a state jump according to the result of continuous collection: if no more than 3 bits of 0 are collected continuously, and then DEC_LIN becomes 1, it means that the current If the positio...

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Abstract

The invention provides an LIN bus decoding, triggering and analyzing method, and relates to a technology which can be used for decoding data transmitted by LIN buses in real time, setting different triggering conditions according to users so as to carry out triggering on correct positions, and summarizing information of all frames in an acquisition range into an event list. Aiming at the disadvantages in the prior art, the method adopts a hardware decoding technology, so that the real-time decoding of a plurality of buses can be realized, the decoding speed is high and the efficiency is high; and only one field programmable logic device is required so that the cost is low. The method for analyzing and triggering LIN buses is simple and low in cost; the analysis and triggering for a plurality of LIN buses can be realized at the same time; and analysis can be carried out on LIN bus signals with any Baud rate so that the universality is strong.

Description

technical field [0001] The invention relates to the field of LIN bus, in particular to a method for decoding, triggering and analyzing the LIN bus. Background technique [0002] The LIN bus is a low-cost single-bus implementation based on the enhanced ISO9141 standard. The bus network has a master device and multiple slave devices. All messages are initiated by the master device, but only one slave device responds, so collision detection and arbitration are not required. The communication is based on UART / SCI with a data rate between 1kb / s and 20kb / s to minimize EMI. The bus is always in one of two states: active or sleeping. [0003] The existing LIN bus analysis and triggering technologies are all based on software algorithm processing, specifically: use software to digitally quantize the received signal to become logic 0 or logic 1, and then analyze and decode bit by bit according to the content of the LIN protocol , and then compare the decoded information with the t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/42
CPCG06F13/42
Inventor 刘纪龙贺增昊刘永姜正吉张成森刘洪庆向前邵成华
Owner THE 41ST INST OF CHINA ELECTRONICS TECH GRP
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