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Thin film transistor and its preparation method, array substrate and its preparation method, display panel

A technology of thin film transistors and array substrates, applied in the display field, can solve the problems of low stability of thin film transistors, low mobility of active layers, etc., and achieve the effects of avoiding the reduction of mobility, improving controllability and high stability

Active Publication Date: 2019-07-23
BOE TECH GRP CO LTD
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  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, in the prior art, the active layer with low carrier concentration (high resistance) is generally formed first, and then the area in the active layer that is in contact with the source electrode and the drain electrode is conductorized, and the conductorized active layer Lower layer mobility and less stability in thin film transistors

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  • Thin film transistor and its preparation method, array substrate and its preparation method, display panel
  • Thin film transistor and its preparation method, array substrate and its preparation method, display panel
  • Thin film transistor and its preparation method, array substrate and its preparation method, display panel

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preparation example Construction

[0033] An embodiment of the present invention provides a method for preparing a thin film transistor, such as figure 1 As shown, the method includes:

[0034] S10, such as figure 2 As shown, an active layer 20 is formed on a substrate 10 , and the active layer 20 includes a source region 21 , a drain region 22 and a channel region 23 .

[0035] Here, the carrier concentration of the active layer 20 is a high carrier concentration. The specific numerical range of the high carrier concentration is not limited, as long as the contact resistance between the source electrode and the drain electrode and the source region 21 and the drain region 22 respectively is small.

[0036] As for the material of the substrate 10, it may be a flexible substrate, a glass substrate, or other substrates. When it is a flexible substrate, the flexible substrate needs to be arranged on the carrier substrate.

[0037] The material of the active layer 20 can be reasonably selected according to the...

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Abstract

A method for manufacturing a thin-film transistor is disclosed, which includes forming an active layer over a substrate, and performing oxidation treatment to a channel region of the active layer for controlling a carrier concentration in the channel region of the active layer. The active layer having a high carrier concentration is directly formed, and the oxidation treatment can be configured to reduce a carrier concentration of the channel region of the active layer to a level where a gating property of the thin-film transistor is still maintained. In the thin-film transistor manufactured thereby, there is a relatively small contact resistance between a source electrode and a source electrode region of the active layer and between the drain electrode and the drain electrode region of the active layer.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a thin film transistor and its preparation method, an array substrate and its preparation method, and a display panel. Background technique [0002] In recent years, with the continuous development of various display technologies, such as LCD (Liquid Crystal Display, Liquid Crystal Display) display, OLED (Organic Light-Emitting Diode, Organic Light-Emitting Diode) display, flexible display, etc., large-size, high-resolution Display panel products emerge in endlessly. [0003] The display panel includes an array substrate, wherein the array substrate includes thin film transistors. The active layer of the top-gate self-aligned thin film transistor is divided into a high-resistance region corresponding to the gate electrode and a low-resistance region corresponding to the source-drain electrode. Since the gate electrode and the low-resistance region in the active layer do not ove...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L29/786
CPCH01L29/66742H01L29/786H01L29/66757H01L29/66969H01L29/78618H01L29/78666H01L29/78675H01L29/7869H01L29/78696H01L21/32105H01L21/324H01L27/1218H01L27/1225H01L27/127
Inventor 王国英陈江博宋振
Owner BOE TECH GRP CO LTD