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Laminated integrated circuit package structure

A technology of integrated circuit and packaging structure, which is applied in the field of stacked integrated circuit packaging structure, which can solve the problems of cross-circuit between bonding wires, inconvenient packaging, and large package volume, so as to reduce the package volume and prevent bending and warping , the effect of increasing flexibility

Active Publication Date: 2016-12-07
江苏卓玉智能科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, stacked packaging is likely to cause cross-circuit between wires or too messy wiring that is difficult to change. The resulting package is often bulky and the packaging is extremely inconvenient, and the wiring cannot be adjusted and changed at will.

Method used

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  • Laminated integrated circuit package structure
  • Laminated integrated circuit package structure
  • Laminated integrated circuit package structure

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Embodiment Construction

[0019] see figure 1 , the present invention firstly provides a stacked integrated circuit package structure, the package structure is a cuboid package, which has a package substrate 1, a plurality of pads 2 are arranged on the package substrate 1, and multi-layer Packaging layer 7, the thickness of each layer of the multilayer packaging layer 7 is different according to the thickness of the integrated circuit chip 3 packaged by each layer, and the thickness of each layer is equal to that of the integrated circuit chip 3 packaged by each layer. The maximum thickness, such as the thickness of the two integrated circuit chips in the third layer packaging layer 7 is different, but the thickness of this layer is equal to the thickness of the thicker integrated circuit chip, in this case, in order to prevent the upper integrated circuit chip Bending, a rigid member 6 is arranged above the thinner chip 3, and its thickness is equal to the thickness of the thicker chip minus the thick...

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PUM

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Abstract

The invention provides a laminated integrated circuit package structure. The laminated integrated circuit package structure is provided with a multi-layer package layer, wherein circuits are respectively arranged at bottoms of other layers, except the bottommost layer, of the multi-layer package layer, the circuits are electrically connected with integrated circuit chips in corresponding layers respectively, circuit layers between layers are electrically isolated by the package layer, a dot-matrix type bonding pads are arranged on a side surface of a package body, and the circuit layers are used for partially or completely electrical connection in the bonding pads to lead out of a terminal. By the laminated integrated circuit package structure, the package volume is reduced, and the package flexibility is improved.

Description

technical field [0001] The invention relates to the field of integrated circuit packaging, in particular to a stacked integrated circuit packaging structure. Background technique [0002] In integrated circuit packaging, wire bonding or wiring is often used to electrically connect the pins of each integrated circuit chip to achieve a predetermined functional module of the package. Stacked chip packaging can reduce the packaging volume, which is currently widely used. way of development. However, stacked packaging is likely to cause problems such as cross-circuit between bonding wires or too messy wiring that is difficult to change. The resulting package is often bulky and the packaging is extremely inconvenient, and the wiring cannot be adjusted and changed at will. Contents of the invention [0003] Based on solving the problems in the above packaging, the present invention provides a stacked integrated circuit packaging structure, which has a packaging substrate, a plur...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/00H01L23/13H01L23/488
CPCH01L23/13H01L23/488H01L23/562
Inventor 王培培
Owner 江苏卓玉智能科技有限公司