On-chip network router and routing method with various working modes

Abstract

The invention discloses an on-chip network router with various working modes. The on-chip network router with various working modes comprises a mode selecting module, a switch-off module and a routing module. The routing module comprises input ports, an input port control module, a buffer management module, buffer zones, a routing calculation module, an arbitration module, a cross switch module, a straight-through module and output ports. The input ports comprise the east input port, the west input port, the south input port, the north input port and the local input port. The output ports comprise the east output port, the west output port, the south output port, the north output port and the local output port. The buffer zones comprise multiple input buffer zones. The invention further discloses an on-chip network routing method with various working modes. Compared with a router of a basic structure, power consumption of the router is effectively reduced through mode switching on the premise that small-area expenses are increased, and accordingly the purpose of optimizing power consumption of a multi-core system is realized in case of dark silicon.

Description

technical field [0001] The invention relates to the technical field of multi-core processor on-chip systems, in particular to an on-chip network router and routing method with multiple working modes. Background technique [0002] With more and more processor cores integrated in the Multiprocessor System-on-Chip (MPSoC), the Network-on-Chip (NoC) based on the data packet transmission The interconnection between provides an efficient, reliable and flexible communication architecture. As the number of processor cores continues to increase, on-chip dark silicon problems also arise. That is, in order to maintain the performance of multi-core systems without exceeding the thermal design power consumption, some processor cores need to be turned off or cannot last for a long operating cycle. For the dark silicon problem, existing solutions focus on optimizing the power consumption of on-chip processor cores, without considering the design of on-chip interconnects. [0003] If the ...

AI Technical Summary

Problems solved by technology

[0003] If the on-chip interconnection is not optimally designed, the on-chip network component modules (routers, network interfaces) must always be kept in the working state, otherwise the routers that are arbitra

Images