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System failure minimum cutest obtaining method based on digraph solving band logic ring

A directed graph and logic loop technology, applied in special data processing applications, instruments, electrical digital data processing, etc., can solve problems such as unintuitive methods, cumbersome minimum cut set operations, etc. simple idea effect

Inactive Publication Date: 2017-02-15
XIAMEN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention is to provide a method for solving the minimum cut set of a system failure with a logical cycle based on a directed graph, so as to solve the problems that the existing method of breaking the logical cycle is not intuitive, and the calculation of the minimum cut set is cumbersome.

Method used

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  • System failure minimum cutest obtaining method based on digraph solving band logic ring
  • System failure minimum cutest obtaining method based on digraph solving band logic ring
  • System failure minimum cutest obtaining method based on digraph solving band logic ring

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Embodiment 1

[0047] refer to Figure 3-9 , to describe Embodiment 1. The system of Embodiment 1 is a linear correlation system with a logic loop composed of systems A, B, C, and D having mutual support relationships. According to the method of the invention, the linear correlation system with logic loop is analyzed to obtain the minimum cut set of failure factors of the target system. The specific analysis steps are:

[0048] Step A: Obtain a directed graph between systems according to the mutual support relationship between systems, see image 3 , denoted as G 0 =0 ,E 0 >

[0049] Step B: Skip this step if there is no mixing system;

[0050] Step C: G 0 =0 ,E 0 > Contains a logical ring structure;

[0051] Step D: select C as the target system;

[0052] Step E: Calculate the out-degree of the vertices corresponding to each system of the non-target system, and set the target system (C) to the corresponding vertex (V C ) into the path, delete the vertices corresponding to the targ...

Embodiment 2

[0066] refer to Figure 10-15 , to describe embodiment 2. The system of embodiment 2 is a logical ring composed of systems A and B that have a mutual support relationship and there is a new extension relationship in the mutual support relationship between A and B that reacts on the two systems of A and B. nonlinear system. According to the method of the invention, the nonlinear system with logic loop is analyzed to obtain the minimum cut set of failure factors of the target system. The specific analysis steps are:

[0067] Step A: Obtain a directed graph between systems according to the mutual support relationship between systems, such as Figure 10 As shown, record the directed graph as G 0 =0 ,E 0 >

[0068] Step B: Transform the hybrid system AB into a new directed graph according to the mutual support relationship, such as Figure 11 shown, denoted as G 00 =00 ,E 00 >

[0069] Step C: G 00 =00 ,E 00 > Contains the logical ring structure of the interaction betwee...

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Abstract

The invention relates to a system failure minimum cutest obtaining method based on a digraph solving band logic ring. The system failure minimum cutest obtaining method is applicable to not only a linear system with an arbitrary number but also a nonlinear system with an arbitrary number. The method is simple in thought, low in calculation amount, intuitional in form, and can obtain the minimum cutest of system failure factors quite conveniently.

Description

technical field [0001] The technical field of the invention is the field of computer-aided reliability analysis, in particular, it relates to a method for solving the minimum cut set of system failure with logical loops based on directed graphs. Background technique [0002] In engineering, when we need to solve the failure probability of a certain component or system, we usually use the fault tree method to solve it. Among them, when a top event or other intermediate events are used as the input of other events at a lower level in the fault tree, we believe that this circular relationship constitutes a logical ring. When an analyst uses a reliability analysis program on a computer to try to solve a fault tree with logical loops, some computer programs report errors. Furthermore, quantitative analysis cannot be performed without eliminating logic loops. Therefore, in order to conduct directional analysis on the top event in the fault description, it is necessary to break t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F19/00
CPCG16Z99/00
Inventor 缪惠芳孙源杨奥
Owner XIAMEN UNIV