Super junction semiconductor device including junction terminal extension structure and manufacturing method
A superjunction semiconductor, junction terminal extension technology, applied in a region and at least partially lined from a first surface region, the region corresponding to the second region to the first surface region, can solve problems such as limiting the voltage blocking capability of power semiconductor devices
Active Publication Date: 2020-03-17
INFINEON TECH AUSTRIA AG
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Problems solved by technology
Since the breakdown voltage Vbr is closely related to the maximum electric field, the region of increased electric field generally limits the voltage blocking capability of power semiconductor devices
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[0026] In the following detailed description, reference is made to the accompanying drawings which form a part hereof, and in which are shown by way of illustrations specific embodiments in which the invention may be practiced. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention. For example, features illustrated or described for one embodiment can be used on or in conjunction with other embodiments to yield still a further embodiment. It is intended that the present invention includes such modifications and variations. The examples are described using specific language which should not be construed as limiting the scope of the appending claims. The drawings are not to scale and are for illustration purposes only. For the sake of clarity, identical elements are designated by corresponding references in different drawings, unless stated otherwise.
[0027] The te...
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A super-junction semiconductor device includes a junction termination area at a first surface of a semiconductor body and at least partly surrounding an active cell area. An inner part of the junction termination area is arranged between an outer part of the junction termination area and the active cell area. A charge compensation device structure includes first regions of a first conductivity type and second regions of a second conductivity type disposed alternately along a first lateral direction. First surface areas correspond to a projection of the first regions onto the first surface, and second surface areas correspond to a projection of the second regions onto the first surface. The super-junction semiconductor device further includes at least one of a first junction termination extension structure and a second junction termination extension structure.
Description
Background technique [0001] Semiconductor devices known as charge-compensated or superjunction (SJ) semiconductor devices such as SJ insulated gate field-effect transistors (SJ IGFETs) are based on mutual space charge compensation of n- and p-doped regions in the semiconductor substrate, which allows for an increase in the area An improved compromise between the area-specific on-state resistance Ron x A and the breakdown voltage Vbr between the load terminals eg source and drain. The performance of charge compensation of SJ semiconductor devices depends on the lateral or horizontal charge balance between n-doped and p-doped regions. The pn junction between the load terminals, for example between the drift region and the body region, is bent in the edge region of the SJ semiconductor device at the main surface. Peak electric fields generally occur in the edge region. Since the breakdown voltage Vbr is closely related to the maximum electric field, the region of increased elec...
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IPC IPC(8): H01L29/78H01L29/06H01L21/336
CPCH01L29/0696H01L29/66712H01L29/7811H01L29/0619H01L29/0634H01L29/0615
Inventor F.希尔勒D.图图克A.韦尔克尔H.韦伯
Owner INFINEON TECH AUSTRIA AG