Integrated circuit testing method

Abstract

The invention provides an integrated circuit testing method including (1) providing an integrated circuit testing structure; (2) testing a single trench isolation structure for a first dielectric parameter; (3) testing a single semiconductor device for a second dielectric parameter; (4) testing adjacent single trench isolation structures and the single semiconductor device for a third dielectric parameter; and (5) comparing the first, second and third dielectric parameters and evaluating the single trench isolation structure.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor testing method. Background technique [0002] With the improvement of the integration level of integrated circuits, the distance between devices in the circuit is getting smaller and smaller, and the influence between adjacent devices is getting bigger and bigger. [0003] Integrated circuits in the prior art often perform electrical isolation of multiple semiconductor devices through isolation trenches, for example, figure 1 The plurality of semiconductor devices 2 formed on the substrate 1 may be, for example, MOS devices, which include gate structures 3 and source / drains 4 , and the plurality of semiconductor devices 2 are dielectrically isolated by trenches 5 . However, as the distance between adjacent devices becomes smaller and smaller, the influence between adjacent devices becomes more and more significant, and the influence of electrical parameter...

AI Technical Summary

Problems solved by technology

However, as the distance between adjacent devices becomes smaller and smaller, the influence between adjacent devices becomes more and more significant, and the influence of electrical parameters such as electromagnetic interference or inductance and capacitance mechanism between each other becomes greater and greater, resulting in integration Degradation of the overall performance of the circuit

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