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A method for testing individual bits on a memory chip

A memory chip, bit technology, applied in semiconductor/solid-state device testing/measurement, electrical components, circuits, etc., can solve the problem of inconvenient testing of single-bit failures

Active Publication Date: 2020-07-14
WUHAN XINXIN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to provide a method for testing a single bit on a memory chip to solve the problem of inconvenient failure testing of a single bit on a memory chip

Method used

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  • A method for testing individual bits on a memory chip

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Embodiment Construction

[0021] In order to make the objects, features and advantages of the present invention more comprehensible, please refer to the accompanying drawings. It should be noted that the structures, proportions, sizes, etc. shown in the drawings attached to this specification are only used to match the content disclosed in the specification, for those who are familiar with this technology to understand and read, and are not used to limit the implementation of the present invention. Limiting conditions, so there is no technical substantive meaning, any modification of structure, change of proportional relationship or adjustment of size, without affecting the effect and purpose of the present invention, should still fall within the scope of the present invention. within the scope covered by the disclosed technical content.

[0022] Such as figure 1 As shown, the present invention provides a method for testing a single bit on a memory chip, comprising the following steps,

[0023] S10: ...

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Abstract

The invention provides a method for testing a single bit on a memory chip, comprising the steps of: providing a memory chip, thinning the memory chip to the word line layer of the target bit; forming a conductive layer on the gate of the word line layer ; Provide a test signal to the conductive layer, and test the electrical characteristics of a single bit through a probe. In the method for testing a single bit on a memory chip provided by the present invention, the memory chip is first thinned to the word line layer, the gate of the word line layer is exposed, a conductive layer is formed on the gate, and then the conductive layer is Provide a test signal to open all the gates connected to the conductive layer, and then test the electrical characteristics of a single bit through the probe to complete the failure test of a single bit on the memory chip.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for testing a single bit on a memory chip. Background technique [0002] In semiconductor manufacturing, semiconductor chip manufacturing has very high process requirements. The entire process needs to go through many tests to find quality problems and finally ensure product quality. From the failure analysis of a memory chip (3D NAND) in a semiconductor integrated circuit, a single bit (bit) failure (fail) is a very common failure mode. When an FA (Failure Analysis) engineer analyzes a single failure bit, It is necessary to combine electrical and physical data to determine the final failure mode. [0003] With the advancement of semiconductor technology, memory chip (3D NAND) technology has been developing vigorously and continuously improving in recent years, and has gradually become a mainstream technology. Therefore, the failure mode analysis of this memor...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/66
CPCH01L22/32
Inventor 汤光敏张顺勇高慧敏卢勤
Owner WUHAN XINXIN SEMICON MFG CO LTD