Data reading and writing method of FIFO (First Input First Output) data cache and data cache thereof
A technology of data buffer and data buffer area, which is applied in the electronic field and can solve the problem that FIFO data buffer cannot realize M-in and N-out data reading methods, etc.
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[0026] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
[0027] Some of the terms involved in this application are explained below for the convenience of readers:
[0028] "The data bit width of the FIFO data buffer", that is, THE WIDTH often seen in English materials, it refers to the data bits of a read and write operation of the FIFO data buffer, just like MCU (English: Microcontroller Uni, Chinese: Micro control unit) has 8 bits and 16 bits, ARM32 bits, etc. The width of the FIFO is fixed in the single-chip fini...
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