System and method for data exchange between central processing unit and IO unit in satellite-borne computer
An internal processor, on-board computer technology, applied in electrical digital data processing, instruments, etc., can solve the problem of difficulty in directly accessing slow IO, etc., and is conducive to software programming, standardized design, and avoid IO access operations. Effect
Active Publication Date: 2017-03-22
BEIJING INST OF CONTROL ENG
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Problems solved by technology
[0005] The technical problem solved by the present invention is: to overcome the deficiencies in the prior art, to provide a data exchange system and method between the internal processor unit and the IO unit of the on-board computer, that is, to provide a simple-designed, flexible and general-purpose on-board computer processing The data exchange method between the processor unit and the IO solves the problem that the existing high-speed processor is difficult to directly access the slow IO, and fully utilizes the performance of the processor
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Embodiment Construction
[0032] The basic idea of the present invention is: a data exchange system and method between the internal processor unit and the IO unit of the on-board computer, a controller with the ability to independently execute IO access instructions is designed, and the CPU can directly access the IO controller and also Data interaction can be realized through a high-speed memory and IO controller. The processor can pre-store the instructions that need to be executed by the IO controller into the high-speed memory, and then the IO controller automatically reads the memory instructions and performs corresponding operations. After the operation is completed, it waits for the next instruction of the processor. The impact of slow IO on the running speed of the processor can give full play to the performance of the processor; cancel the custom three-bus design between the internal boards of the product, which is conducive to the standardized design of the single board; avoid frequent IO ac...
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The invention discloses a system and a method for data exchange between a central processing unit (CPU) and an IO unit in a satellite-borne computer. A controller with a capability of autonomously executing an IO access instruction is designed; and the CPU can directly access the IO controller and also can realize data interaction with the IO controller through a high-speed memory. The CPU can pre-store the instruction needed to be executed by the IO controller in the high-speed memory, then the IO controller automatically reads a memory instruction and executes corresponding operation, and after the operation is finished, the IO controller waits for a next-step instruction of the CPU. According to the system and the method, the effect is remarkable, the influence of low-speed IO on a running speed of the CPU is avoided, and the performance of the CPU is brought into full play; self-defined three-bus design between single boards in a product is canceled, so that standardized design of the single boards is facilitated; and frequent IO access operations of application software are avoided, so that software programming realization is facilitated.
Description
technical field [0001] The invention relates to a data exchange system and method between an internal processor unit and an IO unit of an onboard computer, which belongs to the technical field of data exchange between an internal processor unit and an IO unit of an onboard computer, and is applicable to various onboard high-speed Performance computing occasions, especially occasions that require both large data collection and high-performance computing. Background technique [0002] The on-board computer generally adopts the data exchange method that the processor controls the three buses to directly access the IO board through the data address, such as figure 1 As shown, when the CPU accesses the external IO in the custom three-bus mode, the CPU directly sends control (read or write) signals and corresponding address or data signals. The above three signals must maintain a certain signal amplitude and time (which can be understood as a waveform that meets certain condition...
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IPC IPC(8): G06F13/22G06F13/16
CPCG06F13/1684G06F13/225
Inventor 江耿丰冯丹文亮刘波徐建李森袁文彬史少龙张凯董暘暘
Owner BEIJING INST OF CONTROL ENG