Discharge circuit integrated behind bus rectifier bridge at interior of slave chip

Abstract

The invention relates to a discharge circuit integrated behind a bus rectifier bridge at the interior of a slave chip. The discharge circuit integrated behind the bus rectifier bridge at the interior of the slave chip comprises a digital control module used for generating a pulse width with a high electric level and distributable time to drive the discharge circuit to discharge a bus when the output result of a comparer indicates a bus voltage drop; a discharge current source module used for discharging the bus through a digital module and adjusting the size of a discharge current; the comparer used for obtaining the condition of bus voltage change; and a peripheral circuit used for monitoring the change of the bus voltage, providing a voltage signal for reflecting bus sub-voltage drop information to the comparer and generating a comparison reference voltage. When the discharge circuit integrated behind the bus rectifier bridge at the interior of the slave chip is adopted, the circuit is closed until a bus communication falling edge is monitored, so that power consumption of the whole system cannot be additionally increased; the discharge circuit and a signal processing circuit are relatively independent, so that the noise of the bus cannot be coupled to a circuit which is sensitive to the noise; each parameter of the discharge circuit is configurable, so that demands of different systems for the electric performance can be met, and the product adaptability can be improved.

Description

technical field [0001] The present invention relates to the field of communication technology, in particular to the field of bus power supply communication technology, and specifically refers to a bus rectifier bridge post-discharge circuit integrated in a slave chip. Background technique [0002] Traditionally, polarized communication is used in bus-powered communication systems. The structure of this communication method is as follows figure 1 As shown, the polarity scheme needs to use the marked twisted pair as the signal line for connection to prevent connection errors, that is figure 1 The polarity of the signal lines BUS_C and GND_C must be fixed. This method has the following disadvantages: it is easy to reverse the signal lines when wiring the lines, causing the signal to not be transmitted normally; in addition, in the process of line inspection and correction, polarized connections will bring a lot of inconvenience. Based on the above reasons, the non-polarity c...

AI Technical Summary

Problems solved by technology

This method has the following disadvantages: it is easy to reverse the signal line when wiring the line, causing the signal to not be transmitted normally; in addition, in the process of line inspection and correction, polarized connections will bring a lot of inconvenience

However, this path will always be open and the current will be large, which will greatly increase the power consumption of the system

[0010] 2. The signal noise existing on the bus will be coupled to VDD through the resistor Rx, and VDD will become an unclean power supply

This will affect the performance of the signal processing circuit

In order to avoid this problem, it is necessary to add a filter circuit to VDD, which will increase the complexity of the power system and reduce the reliability of the system, which will increase the design cost.

[0011] 3. The discharge current, discharge time and other parameters of the circuit are fixed, which cannot adapt to the requirements of different bus communication methods, and the application range is narrow

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