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Manufacturing method of semiconductor device

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as poor operation of semiconductor devices

Active Publication Date: 2017-03-22
株式会社PANGEA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At this time, interference such as signal noise occurs between the signal leads arranged in parallel, which may cause malfunction of the semiconductor device.

Method used

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  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device

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Experimental program
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Embodiment Construction

[0018] Embodiments will be described below with reference to the drawings. The relationship between the thickness of each constituent element and the plane size, the ratio of the thickness of each constituent element, and the like described in the drawings may be different from the actual ones. In addition, in embodiment, the same code|symbol is attached|subjected to the substantially same component, and description is abbreviate|omitted suitably.

[0019] As an example of a method of manufacturing a semiconductor device, refer to Figure 1 to Figure 9 An example of a method of manufacturing a semiconductor device as a TSOP (Thin Small Outline Package: TSOP, Thin Small Outline Package) will be described. An example of a method of manufacturing a semiconductor device includes a lead frame preparation step, a lead frame processing step, a chip mounting step, a wire bonding step, a resin sealing step, a plating step, and a trimming (T / F) step. The order of each step is not limi...

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PUM

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Abstract

The invention provides a manufacturing method of a semiconductor device capable of inhibiting signal interferences between a plurality of signal lead wires. The manufacturing method comprises steps that a wiring part is removed from a lead wire frame, and a part of a lead wire of a second power supply, a part of a first signal lead wire, and a part of a second signal lead wire are separated from each other; a semiconductor chip is disposed on the lead wire frame; a bonding wire is disposed on the second signal lead wire in a bridged manner, and is used to electrically connect the first power supply lead wire and the second power supply lead wire; a sealing resin layer is formed; a supporting part is cut from the part of the first power supply lead wire, and a connection part between another parts of the first signal lead wire and the second signal lead wire.

Description

[0001] [Related applications] [0002] This application enjoys the priority of the basic application based on Japanese Patent Application No. 2015-181478 (filing date: September 15, 2015). This application incorporates the entire content of the basic application by referring to this basic application. technical field [0003] Embodiments of the present invention relate to a method of manufacturing a semiconductor device. Background technique [0004] In a semiconductor device including a lead including an outer lead and an inner lead and a semiconductor chip, electrode pads of the semiconductor chip and the inner lead are electrically connected by bonding wires, for example. [0005] In a semiconductor device including a plurality of signal leads, outer leads of two or more signal leads may be arranged in parallel in accordance with semiconductor device standards. At this time, interference such as signal noise may occur between the signal leads arranged in parallel to cau...

Claims

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Application Information

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IPC IPC(8): H01L23/48H01L23/50H01L21/48H01L21/60
CPCH01L23/49541H01L2924/181H01L2924/19107H01L2224/48095H01L2224/48247H01L2224/73265H01L2924/00012
Inventor 石井齐
Owner 株式会社PANGEA