Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Board-level packaging structure and manufacturing method of a chip

A technology of packaging structure and manufacturing method, applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device parts, semiconductor devices, etc., can solve the problem of affecting the electrical performance of the IGBT chip packaging structure, unstable electrical performance of the device, uneven pressure, etc. question

Active Publication Date: 2019-03-05
广东佛智芯微电子技术研究有限公司
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The packaging structure and process of the IGBT chip in the prior art, the point contact mode between the driving circuit layer and the external electrode will lead to unstable electrical performance of the device
The line layer of the source and drain of the IGBT chip is made by crimping or sintering. There is uneven pressure between the internal electrode and the metal layer of the line layer of the source and drain, and defects such as voids affect the entire IGBT chip. Electrical performance of package structure

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Board-level packaging structure and manufacturing method of a chip
  • Board-level packaging structure and manufacturing method of a chip
  • Board-level packaging structure and manufacturing method of a chip

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0042] figure 1 It is a schematic diagram of a board-level package structure of a chip provided by Embodiment 1 of the present invention. figure 2 It is a schematic diagram of a board-level package structure of a chip provided by Embodiment 1 of the present invention.

[0043] Embodiments of the present invention provide a chip board-level packaging structure, such as figure 1 As shown, the structure includes: a substrate 1 on which at least two accommodating spaces 10 are formed, and the accommodating spaces 10 penetrate the substrate 1 . At least one IGBT chip 110 and at least one driver chip 120 embedded in the accommodation space 10 , the IGBT chip 110 and the driver chip 120 are respectively embedded in the corresponding accommodation space 10 . The first dielectric layer 2 formed on the surface of the substrate 1, the IGBT chip 110 and the driver chip 120, at least part of the electrodes of the IGBT chip 110 and the driver chip 120 are exposed and covered with the fir...

Embodiment 2

[0052] image 3 It is a schematic flowchart of a manufacturing method of a board-level packaging structure of a chip provided by Embodiment 2 of the present invention; Figure 4a-Figure 4j It is a cross-sectional view corresponding to each step of a manufacturing method of a chip board-level packaging structure provided in Embodiment 2 of the present invention.

[0053] On the basis of the above examples, refer to image 3 , an embodiment of the present invention provides a method for manufacturing a board-level packaging structure of a chip, the method comprising the following steps:

[0054] Step S110 , providing a substrate.

[0055] refer to Figure 4a , providing a substrate 1 . Exemplarily, the substrate 1 may be a metal molybdenum plate or an organic resin material.

[0056] Step S120, making grooves on the above-mentioned substrate to form at least two accommodating spaces, and the accommodating spaces penetrate the substrate;

[0057] refer to Figure 4b , groo...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The present invention provides a chip board-level packaging structure and a manufacturing method, wherein the packaging structure includes: a substrate on which at least two accommodation spaces are formed; an IGBT chip and a driver chip are respectively embedded in the corresponding accommodation spaces; formed on the substrate , the first dielectric layer on the surface of the IGBT chip and the driver chip, at least part of the electrodes of the IGBT chip and the driver chip are exposed and covered with the first metal plating layer, and the gate of at least one IGBT chip passes through the first metal plating layer formed by the first The circuit layer is electrically connected to the control electrode of the driver chip; the second dielectric layer is covered on the first dielectric layer and the first circuit layer, and the first metal plating layer above the source and drain of the IGBT chip is exposed; the first metal plating layer is formed The metal seed layer on the metal seed layer; the second metal plating layer formed on the second dielectric layer and the metal seed layer. Embodiments of the present invention provide a chip board-level packaging structure and a manufacturing method, which effectively improve the electrical performance of the chip packaging structure.

Description

technical field [0001] The invention relates to the technical field of microelectronic packaging, in particular to a chip board-level packaging structure and a manufacturing method. Background technique [0002] With the wide application and capacity increase of insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, IGBT) chips, higher requirements are put forward for the packaging structure and packaging process of IGBT chips. [0003] The traditional IGBT chip packaging is through crimping and sintering welding, and the crimping or sintering process between the chip and the metal module is used in the process. The driving circuit layer connecting the driving chip and the gate of the IGBT chip is an existing structure, which is buried in the packaging structure, and then contacts the external electrode through the point contact method of the lead wire. The source and drain of the IGBT chip are made by crimping or sintering. [0004] The packaging structure ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/492H01L21/60
CPCH01L24/27H01L24/31H01L23/492H01L2224/73267H01L2224/04105H01L2224/19H01L2224/24137H01L2224/2518H01L2224/32245H01L2224/06181H01L2224/0603H01L2924/13055H01L2224/96
Inventor 郭学平于中尧曹立强林挺宇郝虎
Owner 广东佛智芯微电子技术研究有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products