A single-event upset-resistant latch

An anti-single event and latch technology, applied in the field of anti-single event flipping latches, can solve problems such as system crashes, output errors, and incorrect execution of instructions, and achieve the effect of strong reinforcement performance

Active Publication Date: 2019-12-31
HOHAI UNIV CHANGZHOU
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

SEU does not destroy any components, but it will cause output errors or incorrect execution of instructions, and even cause system crashes

Method used

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  • A single-event upset-resistant latch
  • A single-event upset-resistant latch
  • A single-event upset-resistant latch

Examples

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Embodiment Construction

[0024] The present invention will be further described below in conjunction with the accompanying drawings. The following examples are only used to illustrate the technical solution of the present invention more clearly, but not to limit the protection scope of the present invention.

[0025] The present invention proposes a single-event flip-resistant latch, which includes a first output branch, a second input branch, a third input branch, and a fourth output branch;

[0026] A node A is set on the first output branch;

[0027] The second input branch includes a transmission gate (1), a transmission gate (2), a second redundant branch (1), a second redundant branch (2), a second decision branch, and an inverter (1) , the node B1 is set on the second redundant branch (1), the node B2 is set on the second redundant branch (2), the node B' is set on the second decision branch, and the inverter (1) is set There is node B;

[0028] The third input branch includes a transmission...

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PUM

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Abstract

The invention discloses a latching device for single event upset prevention. The latching device is composed of a first output branch, a second input branch, a third input branch and a fourth output branch. The second input branch consists of a transmission gate (1), a transmission gate (2), a second redundant branch (1), a second redundant branch (2), a second decision branch, and an inverter (1). The third input branch includes a transmission gate (3), a transmission gate (4), a third redundant branch (1), a third redundant branch (2), a third decision branch, and an inverter (2). According to the latching device disclosed by the invention, with the input X and the input X', single event upset (SEU) prevention is enhanced by the second and third redundant branches and the second and third decision branches of the second and third input branches; phase inversion is realized by using the inverter (1) and the inverter (2); and then because of an output node A(=X') and an output node D(=X) of the first and fourth output branches, SEU prevention is enhanced further.

Description

technical field [0001] The invention relates to a single-event flip-resistant latch, which belongs to the technical field of integrated circuits. Background technique [0002] In the past 20 years, with the rapid development of microelectronics technology, chips with high integration and low power consumption have been used in many fields, such as nuclear control, missile system, aerospace and traffic control. As a space power, my country has put forward higher requirements for the application of microelectronics in the aerospace environment. However, in various space application fields, the probability of microprocessor errors increases significantly due to the impact of harsh radiation environments. Small errors in microprocessors can lead to huge losses. Therefore, more and more people begin to pay attention to how to enhance the fault tolerance and reliability of the microprocessor in the strong radiation environment. [0003] Radiation is a major cause of microproces...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K19/003
CPCH03K19/00315
Inventor 王海滨魏臻江曾翔惠志坚唐鸿辉葛惟唯秦涛戴茜茜翟文权刘小峰
Owner HOHAI UNIV CHANGZHOU
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