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Automatic setting system for setting testing probe height of wafer prober

An automatic setting and wafer technology, applied in semiconductor/solid-state device testing/measurement, electrical components, circuits, etc., can solve problems such as inaccuracy, time-consuming inspection of needle marks, and differences in subjective judgments of personnel, so as to save time , to avoid the effect of subjective judgment differences

Inactive Publication Date: 2017-04-05
印顾魏
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] At present, the method of setting wafer needle pressure is mainly based on manual visual inspection. The manual visual method has differences in the subjective judgment of personnel, which is not accurate enough, and multiple manual inspections of needle marks will consume a lot of inspection time when the number of measurements is large.
As wafer bump technology becomes the new mainstream of chip interconnection, it is difficult to find the best test pin pressure with the existing manual visual method

Method used

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  • Automatic setting system for setting testing probe height of wafer prober
  • Automatic setting system for setting testing probe height of wafer prober

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Embodiment Construction

[0017] In order to make the technical means, creative features, goals and effects achieved by the present invention easy to understand, the present invention will be further described below in conjunction with specific illustrations.

[0018] During specific implementation, combined with figure 1 , an automatic setting system for setting wafer probe pressure, including a control host 100, a testing machine communication connection device 201, a testing machine head 202, a testing machine and a probe card connecting device 203, a probe card substrate 301, Probe 302, wafer 400, probing machine 500, probing machine communication connection device 501, probing machine carrying wafer tray 502, pin probing machine carrying wafer base 503, control wafer tray up key 504, control wafer Circular tray down key 505, needle measurement key 506.

[0019] The control host 100 is connected to the test head 202 through the test machine communication connection device 201 , and the probe 302 i...

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Abstract

The invention discloses an automatic setting system for setting the testing probe height of a wafer prober. The system includes a control mainframe, a testing machine communication connecting apparatus, a testing machine head, a testing machine and probe card connecting apparatus, a probe card substrate, a prober, a wafer, a probe testing machine, and a probe testing machine communication connecting apparatus. The control mainframe is connected to the testing machine head through the testing machine communication connecting apparatus. The probe card is arranged on the probe card substrate and is connected to the testing machine head through the testing machine and probe card connecting apparatus. The probe testing machine is connected to the control mainframe through the probe testing machine communication connecting apparatus. A probe testing machine carrying wafer tray is fixed to a probe testing machine carrying wafer pedestal. A wafer is arranged on the probe testing machine carrying wafer tray. According to the invention, the automatic setting system can automatically set the testing probe height of the wafer prober, can easily find the wafer with the best probe testing probe heights, avoids differences of subjective judgment of setting workers, replaces detection prober trace with one-time button, is accurate, and can save time.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing equipment, in particular to an automatic setting system for setting wafer needle pressure. Background technique [0002] The production and manufacture of semiconductors has formed a perfect production process in the continuous development. Generally, it is integrated circuit design (in order to achieve certain functions, design a reasonable circuit)-wafer manufacturing (integrate the integrated circuit on the wafer through a special process)-wafer testing (integrate thousands of chips on the wafer) Tens of thousands of integrated circuit chips are functionally tested, and some chips with functional defects are eliminated) - Wafer cutting and grinding (cutting and removing chips that pass the functional test on the wafer) - Chip packaging (cutting and removing chips that have passed the functional test from the wafer) The chip is packaged to protect its circuit from the influe...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/66
CPCH01L22/34
Inventor 沈顺金
Owner 印顾魏
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