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A semiconductor testing structure and testing method

A test structure, semiconductor technology, applied in the direction of semiconductor/solid-state device testing/measurement, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problems of long cycle time, inability to monitor through-hole metal conductive columns in real time, etc., and achieve simple structure Effect

Active Publication Date: 2019-03-29
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a semiconductor testing structure and testing method, which is used to solve the problem that the prior art cannot monitor the defects of the through-hole metal conductive pillars in real time, and the existing improvement period is too long. question

Method used

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  • A semiconductor testing structure and testing method
  • A semiconductor testing structure and testing method
  • A semiconductor testing structure and testing method

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Embodiment 1

[0047] The present invention provides a semiconductor test structure, please refer to figure 1 , shown as a cross-sectional view of the semiconductor test structure, including:

[0048] The first metal layer 100; the first metal layer 100 includes at least two ground metal lines 101 arranged in parallel, and at least two rectangular first metal blocks 102 are formed between two adjacent ground metal lines 101; A metal block 102 is arranged in the same direction as the ground metal wire 101;

[0049] The second metal layer 200; the second metal layer 200 includes a plurality of metal conductive pillars 201 corresponding to the first metal block 102, and the metal conductive pillars 201 are connected to the top of the first metal block 102;

[0050] The third metal layer 300; the third metal layer 300 includes a plurality of rectangular second metal blocks 301 corresponding to the metal conductive columns, the second metal blocks 301 are connected to the top of the metal conduc...

Embodiment 2

[0066] This embodiment adopts basically the same technical solution as Embodiment 1, except that the semiconductor test structure of Embodiment 1 includes only one block, while the semiconductor test structure of this embodiment includes at least two blocks.

[0067] see Figure 4 , shown as a top view of the semiconductor test structure in this embodiment, as shown in the figure, the semiconductor test structure includes at least two blocks, such as the first block I, the second block II, and the third block III ,……. Each block is composed of the first metal layer 100, the second metal layer 200, and the third metal layer 300 as described in Embodiment 1, that is, the first metal layer 100 includes at least two ground metal lines arranged in parallel 101, at least two rectangular first metal blocks 102 are formed between two adjacent ground metal lines 101; the arrangement direction of the first metal blocks 102 and the ground metal lines 101 is the same; the second metal la...

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Abstract

The invention provides a testing structure of a semiconductor, The testing structure comprises a first metal layer, a second metal layer, and a third metal layer. The first metal layer includes at least two ground metal wires arranged in parallel; and at least two oblong first metal blocks having the arrangement direction identical with that of the ground metal wires are formed between the two adjacent ground metal wires. The second metal layer includes a plurality of metal conductive posts that correspond to the first metal blocks and are connected to the tops of the first metal blocks. And the third metal layer consists of a plurality of oblong second metal blocks corresponding to the metal conductive posts; the second metal bocks are connected to the tops of the metal conductive posts and the arrangement direction of the second metal blocks is perpendicular to that of the ground metal wires. The testing structure has a simple structure; and the interlamination through-hole metal layer process can be reflected effectively. With a plurality of blocks with different testing distances, the on-line process window size can be fed back in real time and the process improvement can be promoted; and with the testing method, a defect can be localized rapidly; and the operation improvement effect can be fed back timely.

Description

technical field [0001] The invention belongs to the field of semiconductor manufacturing, and relates to a semiconductor testing structure and testing method. Background technique [0002] With the advancement of semiconductor technology, the integration of integrated circuits is getting higher and higher, and the size of semiconductor devices is getting smaller and smaller. Therefore, minor errors in the process of manufacturing will have serious impacts on yield, device performance, and device reliability. Impact. [0003] Manufacturing smaller-sized, higher-performance devices has always been the goal and direction of the development of the semiconductor industry. With the advancement of the 28nm process node, in order to further realize mass production, there are many problems in the metal back-end process that need to be solved. Among them, in the subsequent etching process, the larger feature size of the through hole is an important factor causing the current low yiel...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/544H01L21/66
Inventor 李日鑫高保林殷原梓
Owner SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP
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