Static random access memory

A static random access and memory technology, applied in the field of memory, can solve the problems of large memory cell area and inability to effectively improve the integration degree of components, and achieve the effect of improving the integration degree, reducing the size, and reducing the gate size

Active Publication Date: 2017-05-10
POWERCHIP SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, the disadvantage of the existing SRAM is that the area occupied by the storage unit is large, and the integration of components cannot be effectively improved.

Method used

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Embodiment Construction

[0047] Embodiments of the invention are described more fully hereinafter with reference to the accompanying drawings. However, the present invention may be practiced in many different forms and is not limited to the embodiments set forth herein. The directional terms mentioned in the following embodiments, such as "upper", etc., are only referring to the directions of the attached drawings, so the directional terms used are for explaining the description rather than limiting the present invention. In addition, the size and relative size of each layer may be exaggerated for the sake of clarity in the drawings.

[0048] Figure 1A It is a top view of the SRAM according to the first embodiment of the present invention. exist Figure 1A In , the drawing of the dielectric layer and the spacer is omitted for more clear description. Figure 1B for along Figure 1A Sectional view of the I-I' section line in. Figure 1C for along Figure 1A The cross-sectional view of the II-II' sec...

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PUM

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Abstract

The present invention discloses a static random access memory comprising at least one static random access memory unit. The gate layout of the static random access memory unit includes first to fourth strip-like doped regions, a concave gate line, a first gate line, and a second gate line. The first to fourth strip-like doped regions are sequentially disposed in the substrate and separated from each other. The concave gate lines intersect the first to fourth strip-like doped regions. The first to fourth strip-like doped regions are disconnected from the intersection of the concave gate lines. The first gate line intersects the first strip-like doped region and the second stripe-like doped region. The first strip-like doped region and the second strip-like doped region are disconnected from the intersection of the first gate line. The second gate line intersects the third strip-like doped region and the fourth strip-like doped region. The third strip-like doped region and the fourth strip-like doped region are disconnected from the intersection of the second gate line.

Description

technical field [0001] The present invention relates to a memory, and in particular to a static random access memory. Background technique [0002] Random access memory (Random Access Memory, RAM) is a kind of volatile memory, and is widely used in information electronic products. Generally speaking, random access memory includes static random access memory (Static Random Access Memory, SRAM) and dynamic random access memory (Dynamic Random Access Memory, DRAM). [0003] Static random access memory has a faster speed for data processing, and its manufacturing process can be integrated with the manufacturing process of complementary metal oxide semiconductor transistors (Complementary Metal Oxide Semiconductor, CMOS), so the manufacturing process of static random access memory Relatively simple. [0004] However, the disadvantage of the existing SRAM is that the area occupied by the memory unit is large, and the integration degree of components cannot be effectively improve...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11H01L29/423H01L21/8244
CPCH01L29/4236H10B10/12
Inventor 永井享浩
Owner POWERCHIP SEMICON MFG CORP
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