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Semiconductor structure

A semiconductor and dielectric structure technology, which is applied in the field of epitaxial semiconductor fin structure, can solve the problems of increasing the difficulty of semiconductor elements, increasing the epitaxial structure, the complexity of semiconductor manufacturing process, and the difficulty of manufacturing process control.

Active Publication Date: 2017-05-10
UNITED MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] However, the adoption of the epitaxial structure can effectively improve the performance of the device, but the fabrication of the epitaxial structure greatly increases the complexity of the semiconductor manufacturing process and the difficulty of manufacturing process control
For example, in a SiGe epitaxial structure, the germanium concentration can be increased to increase the stress, but thicker SiGe epitaxial structures or higher germanium concentrations in SiGe epitaxial structures will generate dislocations in the epitaxial structures, and the dislocation The generation of the epitaxial structure will lead to lower stress provided by the epitaxial structure, thus increasing the difficulty in the design and manufacture of semiconductor elements with epitaxial structures
[0004] It can be seen that although the existence of epitaxial structures can effectively improve device performance, the industry is still facing challenges as the complexity of semiconductor manufacturing processes and products continues to increase.

Method used

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  • Semiconductor structure
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Embodiment Construction

[0036] see Figure 1 to Figure 7 , Figure 1 to Figure 7 It is a schematic diagram of a preferred embodiment of the manufacturing method of the semiconductor structure provided by the present invention. Such as figure 1 As shown, the method for fabricating a semiconductor structure provided by this preferred embodiment firstly provides a semiconductor substrate 100 . The semiconductor substrate 100 includes a first semiconductor material, and the first semiconductor material may be silicon, germanium, III-V compound, or II-VI compound. In this preferred embodiment, the first semiconductor material is preferably silicon, but not limited thereto. In addition, in this preferred embodiment, the semiconductor substrate 100 may be a silicon (bulk) substrate and may have a (100) crystal plane. Next, a dielectric structure 102 can be formed on the semiconductor substrate 100 , and the dielectric structure 102 can be fabricated using a shallow trench isolation (STI) fabrication meth...

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Abstract

The invention discloses a semiconductor structure comprising a semiconductor substrate, a dielectric structure which is formed on the semiconductor substrate and includes at least one groove, a fin structure which is formed in the groove and a dislocation region which is formed in the fin structure. The semiconductor substrate comprises first semiconductor material. The fin structure comprises the first semiconductor material and second semiconductor material, and the lattice constant of the second semiconductor material is different from the lattice constant of the first semiconductor material. The highest part of the dislocation region is higher than the opening of the groove.

Description

technical field [0001] The invention relates to a semiconductor structure, in particular to an epitaxial semiconductor fin structure. Background technique [0002] Epitaxial structures are widely used in semiconductor manufacturing processes. For example, in the prior art, selective epitaxial growth (SEG) technology is often used to form a lattice arrangement and The same epitaxial structure as the substrate, such as a silicon germanium (silicon germanium, hereinafter referred to as SiGe) epitaxial structure. Utilizing the feature that the lattice constant of the SiGe epitaxial structure is larger than that of the silicon substrate, the SiGe epitaxial structure can generate stress and be used to improve the performance of the MOS transistor. [0003] However, the adoption of the epitaxial structure can effectively improve the device performance, but the fabrication of the epitaxial structure greatly increases the complexity of the semiconductor manufacturing process and the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/06
CPCH01L29/0684H01L29/785H01L29/66795H01L29/1054H01L21/02381H01L29/778H01L21/02538H01L29/105H01L27/092
Inventor 杨玉如江怀慈林胜豪黄世贤陈建宏吴俊元蔡成宗
Owner UNITED MICROELECTRONICS CORP
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