Unlock instant, AI-driven research and patent intelligence for your innovation.

A three-dimensional stacked memory

A three-dimensional stacking and memory technology, applied in the field of memory, can solve the problems of limited redundant storage resource utilization, low resource utilization, and inability to effectively share redundant storage resources, etc. Effect

Active Publication Date: 2020-05-05
PEKING UNIV SHENZHEN GRADUATE SCHOOL
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The resource utilization of the intra-layer redundancy repair strategy and the whole-layer redundancy repair strategy is low, while the paired redundancy repair strategy cannot effectively share the redundant storage resources between the paired layers, which also limits the utilization of redundant storage resources

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A three-dimensional stacked memory
  • A three-dimensional stacked memory
  • A three-dimensional stacked memory

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0025] The present invention will be further described in detail below through specific embodiments in conjunction with the accompanying drawings.

[0026] In the embodiment of the present invention, based on the sharing of redundant resources between adjacent layers, the repair strategy of the three-dimensional stacked memory is rationally designed to improve the utilization rate of redundant resources in the memory and to achieve a higher repair rate of faulty units, and at the same time, it can Effectively avoid deadlock problems.

[0027] This embodiment provides a three-dimensional stacked memory, including multi-layer memory 1, each layer of memory 1 includes: storage array 11, backup storage unit 12, built-in self-test module 13, redundant resource replacement module 15, its functional block diagram is as follows figure 2 shown.

[0028] Specifically, the storage array 11 is formed by arranging storage units, and the storage units are used to store data. The spare me...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a three-dimensional stacking memory. The three-dimensional stacking memory comprises multiple layers of memories, each layer of the memory comprises a memory array formed by memory units and used for storing data, a spare memory cell serving as a redundant resource and replacing a fault memory unit, a built-in self-testing module used for testing the memory and calibrating the position of the fault memory unit in the memory array, and a redundant resource replacing module used for using the spare memory cell on the layer of the fault memory unit and the spare memory unit on the adjacent layer to replace the fault memory unit according to the position of the fault memory unit calibrated by the built-in self-testing module. Therefore, the redundant resource replacing module uses the spare memory cell on the layer of the fault memory unit and the spare memory unit on the adjacent layer to replace the fault memory unit according to the position of the fault memory unit calibrated by the built-in self-testing module, the use ratio of the redundant resource and the repair rate of the fault unit are improved under the condition of relatively small area of a silicon through hole.

Description

technical field [0001] The invention relates to the field of memory, in particular to a three-dimensional stack memory. Background technique [0002] Three-dimensional stacked memory uses through-silicon vias (TSV), micro bumps (Micro Bump), etc. to form vertical signal paths to realize vertical stacking of two-dimensional memory chips, which can improve the integration and memory access bandwidth of the memory at the same time , is an important means to break through the "storage wall" problem of computer performance improvement. JEDEC has formulated the Wide I / O interface standard for 3D stacking applications of memory and logic circuits, which greatly improves the 3D stacking integration capability of 3D stacked memories. A schematic diagram of a three-dimensional stacked memory such as figure 1 As shown, it is predicted that three-dimensional stacked memory will play an important role in the fields of large-scale storage and high-performance computing in the near futur...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/44
Inventor 崔小乐张世界金玉丰
Owner PEKING UNIV SHENZHEN GRADUATE SCHOOL