Transistor and forming method thereof

A transistor and U-shaped technology, applied in the field of transistors and their formation, can solve the problems of low mobility and inability to better improve the performance of semiconductor devices, so as to improve mobility, improve the barrier reduction effect introduced by the drain terminal, and reduce the tip The effect of discharge

Active Publication Date: 2017-06-16
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, the carrier mobility in the channel region of the transistor in the prior art is still low, which cannot better improve the performance of the semiconductor device.

Method used

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  • Transistor and forming method thereof
  • Transistor and forming method thereof
  • Transistor and forming method thereof

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Experimental program
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Embodiment Construction

[0040] It can be known from the background art that the transistor in the prior art has the problem of low carrier mobility in the channel region. Now combined with the structure of the transistor to analyze the reasons for the low carrier mobility:

[0041] refer to figure 1 , showing a schematic diagram of the structure of a transistor.

[0042] The transistor includes: a substrate 10 and a gate structure 20 located on the surface of the substrate 10 .

[0043] In order to improve the carrier mobility in the transistor channel region, Sigma-shaped stress layers 30 are usually arranged in the substrate 10 on both sides of the gate structure 20 . The sigma-shaped stressor layer 30 has a bulge directed toward the channel region, and the stress material located at the bulge is closer to the channel region, which can induce greater stress in the channel region.

[0044] In order to enable the stressor layer 30 to introduce enough stress in the channel region, the stressor laye...

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Abstract

The invention provides a transistor and a forming method thereof. The forming method comprises: a base including a substrate, a stress constraint layer and a channel layer are provided, wherein the stress constraint layer and the channel layer are arranged on the surface of the substrate successively; a gate structure is formed on the base; the channel layer at the two sides of the gate structure are removed and grooves are formed in the sidewall of the remaining channel layer; the stress constraint layer at the two sides of the gate structure is removed and the base at the two sides is removed with a certain thickness to form a first opening; and the first opening is filled to form a stress layer. Because the stress constraint layer is arranged in the base, the stress layer arranged at the two sides of the gate in the base has a part having a protrusion in the channel layer and a part in the stress constraint layer and the substrate. The protrusion of the stress layer in the channel layer enables stresses to be led into a channel in the channel layer; the stress layer in the stress constraint layer and the substrate enables the size of the stress layer to be increased, so that the stress of the channel region can be increased. Therefore, the migration rate of carriers in the channel can be improved, so that the transistor performance can be improved.

Description

technical field [0001] The present invention relates to the field of semiconductor manufacturing, in particular to a transistor and a method for forming the same. Background technique [0002] As the most basic semiconductor device, transistors are being widely used. With the increase in the density and integration of components in integrated circuits, the size of transistors is getting smaller and smaller. As transistor size shrinks, transistor channel length and gate length also shorten. The shortening of the channel length of the transistor makes the approximation of the graded channel no longer tenable, causing the short channel effect, which in turn generates leakage current and affects the performance of the semiconductor device. By introducing stress to the channel region of the transistor, the mobility of carriers in the channel can be improved, thereby increasing the driving current of the transistor, thereby suppressing the leakage current of the transistor. [...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336H01L29/78
CPCH01L29/66477H01L29/7843H01L29/7848
Inventor 赵猛
Owner SEMICON MFG INT (SHANGHAI) CORP
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