Reconfigurable S box circuit structure

A technology of circuit structure and calculation results, applied in electrical components, encryption devices with shift registers/memory, digital transmission systems, etc., can solve the problems of large volume of encryption method devices and large area of ​​cryptographic algorithm circuits, etc., and achieve circuit optimization Efficiency improvement and circuit area reduction effect

Active Publication Date: 2017-07-04
WUHU INST OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0048] In the prior art, the S-box operation in the AES cryptographic algorithm and the S-box operation in the SM4 cryptographic algorithm are respectively implemented through two different circuits, resulting in a relatively large circuit area for the overall cryptographic algorithm, so that the application of the encryption method The device is larger

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  • Reconfigurable S box circuit structure
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  • Reconfigurable S box circuit structure

Examples

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Embodiment Construction

[0081] The specific implementation of the reconfigurable S-box circuit structure provided by the present invention will be described in detail below in conjunction with the accompanying drawings.

[0082] This specific embodiment provides a reconfigurable S-box circuit structure, figure 1It is a schematic structural diagram of a reconfigurable S-box circuit according to a specific embodiment of the present invention. The reconfigurable S-box circuit structure described in this specific embodiment can realize the reconfigurable functions of operations such as AES encrypted S-box, AES decrypted S-box and SM4S-box based on the composite domain. figure 2 It is a schematic diagram of the reconfigurable S-box circuit structure of the specific embodiment of the present invention under the working mode of AES encrypted S-box; image 3 It is a schematic diagram of the reconfigurable S-box circuit structure in the AES decryption S-box working mode according to the specific embodiment ...

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Abstract

The invention provides a reconfigurable S box circuit structure, comprising a first composite matrix multiplication unit, a second composite matrix multiplication unit, a first constant addition unit, a second constant addition unit, a third constant addition unit, a fourth constant addition unit, a composite domain multiplication unit, a first selector, a second selector, a byte data input port, a byte data output port and a control signal input port. The first selector and the second selector are three-in-one selectors. According to the reconfigurable S box circuit structure provided by the invention, in a mode of multiplexing composite domain multiplication inversion unit, reconfigurable functions of AES (Almost Blank Subframe) encryption S box operation, AES decryption S box operation and SM4S box operation are realized. Through multiplexing of composite domain multiplication inversion, a circuit area is greatly reduced; a composite matrix structure in the reconfigurable S box is beneficial for the improvement of the circuit optimization efficiency; and the circuit area is further reduced.

Description

technical field [0001] The invention relates to the field of cryptographic circuits, in particular to a reconfigurable S-box circuit structure. Background technique [0002] 1. AES encryption algorithm and SM4 encryption algorithm [0003] AES (Advanced Encryption Standard, Advanced Encryption Standard) is a new generation of block symmetric cipher algorithm formulated by the National Institute of Standards and Technology in 2001 to replace the original DES (Data Encryption Standard, Data Encryption Standard). The data packet length of the AES encryption algorithm is 128 bits, and there are three kinds of key lengths: 128, 192 and 256 bits. AES stipulates that according to these three different key lengths, the encryption process requires 10, 12, and 14 rounds of round transformation operations, and each round transformation operation includes byte replacement, row shifting, column mixing, and key addition. In addition to the last round, in order to eliminate symmetry, the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L9/06
CPCH04L9/0631
Inventor 郑辛星张肖强
Owner WUHU INST OF TECH
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