Internal serial interface

Abstract

A simplified serial interface for a communications device. The serial interface includes an RF front end and a transmit block and at least one receive block located on different dies. The receive block is activated by a clock generator that is separate than the system clock. The at least one receive block can inhibit transmission of an enable signal to the receive block and inhibit operation of an oscillator of the interface.

Description

technical field [0001] Embodiments of the present invention relate to electronic systems, and in particular, to serial interfaces of electronic communication devices and systems. Background technique [0002] Radio Frequency Front Ends (RFFEs) used in conjunction with devices such as smartphones, tablets, computers, etc. are increasingly required to have more control states that further require control of additional peripheral or downstream devices. Typically, the added control state for controlling additional peripherals is accomplished using a standard general purpose input output (GPIO) interface or a standard serial MIPI RFFE type interface. [0003] However, these interfaces consume a lot of IC resources. For example, increasing the amount of GPIO semaphores requires more real estate on the master and slave chips using wire-bond connections. This problem is particularly prominent for flip chip (flip chip style dies). In addition, this approach also leads to larger ro...

AI Technical Summary

Problems solved by technology

Additionally, there is a need for slave devices with serial interfaces that consume fewer routing resources and do not require additional slave addresses, register maps, and / or pins

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