Video signal deinterlacing system and processing method based on FPGA

Abstract

The invention discloses a video signal deinterlacing system based on a FPGA. The system comprises the FPGA, and a video decoding chip, a dual-port SRAM and an LCD module which are coupled to the FPGA, wherein the video decoding chip receives a PAL analog video signal, and outputs video data to the FPGA after performing analog-digital conversion and collection conversion on the PAL analog video signal; the dual-port SRAM receives the control signal and the video signal of the FPGA to cache the video data input to the FPGA by the video decoding chip; the FPGA fuses the video data with the video data of a next frame, and then filtering; and the LCD module displaces the data. The system overcomes the problems that in the prior art, the deinterlacing technology is large in hardware complexity and PCB area, and display quality of an interlaced video on the LCD is poor.

Description

Technical field [0001] The invention relates to an FPGA-based system and processing method for de-interlacing video signals. Background technique [0002] In the traditional CRT analog video imaging display device, an interlaced scanning method is adopted, which can basically meet people's viewing needs when the image quality is not high. However, with the development of display technology, especially the popularity of high-definition LCD digital TVs, people have higher and higher requirements for the quality of video display. Therefore, some related problems brought about by interlaced video in the past have become more and more prominent, and they cannot meet people's needs. However, the interlaced video is still used in some video sources, and it is impossible to immediately exit the stage of history. [0003] In engineering practice, we often use cameras to collect data. The output data of most of the cameras currently used are Y / C signals (video signals) of the PAL system (...

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Problems solved by technology

[0004] With regard to the above-mentioned prior art, the purpose of the present invention is to overcome the problems of large hardware complexity, high material cost, large PCB area, complicated operation and poor display quality of interlaced video on LCD in the prior art de-interlacing technology, So as to provide a FPGA-based video signal deinterlacing system that reduces hardware complexity and material cost, reduces PCB area, and algorithm can significantly improve the display quality of interlaced video on LCD, improve viewing effect and facilitate transplantation and processing method

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