non-volatile memory device

Abstract

A nonvolatile memory device comprising a nonvolatile memory cell array, a page buffer circuit, a data input / output circuit, and control logic, wherein N bits are stored in a single memory cell (N is an integer greater than or equal to 2 ), the page buffer circuit is electrically connected to the nonvolatile memory cell array. The page buffer circuit includes at least N latches configured to temporarily store data. A data input / output circuit connected to the page buffer circuit receives programmed input data and provides the input data to the page buffer circuit. The control logic controls the page buffer circuit and initializes the value of the target latch before receiving all input data for programming cells from the data input / output circuit.

Description

[0001] Cross References to Related Applications [0002] This patent application claims priority from Korean Patent Application No. 10-2016-0021109 filed on February 23, 2016, the entire contents of which are incorporated herein by reference. technical field [0003] The present disclosure relates to semiconductor memory devices, and more particularly, to nonvolatile memory devices. Background technique [0004] A semiconductor memory device may include volatile memory such as DRAM and / or SRAM. The semiconductor storage device may also include nonvolatile memory such as EEPROM, FRAM, PRAM, MRAM, flash memory, and the like. Volatile memory can lose data stored in it when power is lost, while non-volatile memory retains data stored in it even when power is lost. Specifically, flash memory devices may have advantages such as high programming speed, low power consumption, large storage capacity, and the like. For this reason, flash memory systems including flash memory device...

AI Technical Summary

Problems solved by technology

However, considering the manufacturing process, conventional 2D flash memory has limitations in increasing integration

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