Multilayer wiring substrate
A technology for wiring substrates and substrates, which is applied in the manufacture of multi-layer circuits, printed circuits where non-printed electrical components are connected, and fixed connections. Effect
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Embodiment 1～ Embodiment 7
[0316] Produced as Example 1 to Example 7 figure 2 (B) A multilayer wiring board having the structure shown.
[0317] A TEG chip (B) having a level difference between a passivation layer and a Cu pad surface was used as a wiring board. In addition, the step difference between the passivation layer and the Cu pad surface was 50 nm.
[0318] The TEG chip (B) and the anisotropic conductive member were sequentially stacked, and bonded under the conditions shown in Table 1 by using a room temperature bonding device (WP-100, manufactured by PMTCORPORATION) and held for 5 minutes to fabricate a multilayer structure. Samples of wire substrates.
[0319] The junction of the produced multilayer wiring board was cut with respect to the thickness direction by FIB, and a surface photograph (magnification of 50,000 times) was taken by FE-SEM for its cross-section, and observed. The results of Examples 1- In Example 7, the adjacent conduction paths among the conduction paths in contact w...
Embodiment 8
[0321] Produced as Example 8 figure 2 (B) A multilayer wiring board having the structure shown.
[0322] That is, it carried out similarly to Example 5 except having made the level difference of the passivation layer of a TEG chip (B) and the Cu pad surface into 150 nm.
[0323] The joint portion of the produced multilayer wiring board was cut with respect to the thickness direction by FIB, and the surface photograph (magnification: 50,000 times) was taken by FE-SEM of the cross section, and observed. The result was the following shape: Adjacent ones of the conduction paths in contact with the electrodes are in contact with each other, and the conduction paths not in contact with the electrodes are embedded in the adhesive layer without being in contact with other conduction paths.
Embodiment 9
[0325] Produced as Example 9 figure 2 (A) A multilayer wiring board having the structure shown.
[0326] That is, it carried out similarly to Example 5 except having used the TEG chip (A) which has a resin layer on a passivation layer as a wiring board, and having made the thickness of a resin layer into 400 nm.
[0327] The joint portion of the produced multilayer wiring board was cut with respect to the thickness direction by FIB, and the surface photograph (magnification: 50,000 times) was taken by FE-SEM of the cross section, and observed. The result was the following shape: Adjacent conductive paths among the conductive paths that are in contact with the electrodes are in contact with each other, and the conductive paths that are not in contact with the electrodes penetrate the resin layer without being in contact with other conductive paths.
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