Approximate floating-point multiplier for neural network processor and floating-point multiplication

Abstract

The invention discloses an approximate floating-point multiplier for a neural network processor and a floating-point multiplication. When the approximate floating-point multiplier executes fractional part multiplying operation on an operand, part bits are intercepted from all high bits of a fractional part of the operand according to designated precision, and 1 is supplemented to the front and the back of the intercepted part bits to obtain two new fractional parts; multiplying operation is performed on the two new fractional parts to obtain an approximate fractional part of a product; and zero is supplemented to a low bit of the normalized approximate fractional part so that the bits of the approximate fractional part are consistent with the bits of the fractional part of the operand, and therefore the fractional part of the product is obtained. According to the approximate floating-point multiplier, an approximate calculation mode is adopted, different bits of the fractional part are intercepted according to a precision demand for corresponding multiplying operation, energy loss of multiplying operation is lowered, multiplying operation speed is increased, and therefore the performance of a neural network processing system is more efficient.

Description

technical field [0001] The present invention relates to neural network processors, and more particularly to multiplication operations within neural network processors. Background technique [0002] At present, neural network processors usually use trained weight data as input signals to perform calculation operations on neural network models. Multiplication and addition operations are important links in neural network operations. In order to reduce design complexity and improve operational efficiency, most dedicated hardware accelerators usually use fixed-point multipliers for multiplication operations, and most of the weight data obtained from training are calculated in floating points. environment, the mismatch of data storage and computing forms between the training environment and the hardware acceleration environment leads to a large difference between the hardware acceleration processing results and the training results. However, if the traditional floating-point mult...

AI Technical Summary

Problems solved by technology

Multiplication and addition operations are important links in neural network operations. In order to reduce design complexity and improve operational efficiency, most dedicated hardware accelerators usually use fixed-point multipliers for multiplication operations, and most of the weight data obtained from training are calculated in floating points. environment, the mismatch of data storage and calculation forms between the training environment and the hardware acceleration environment leads to a large difference between the hardware acceleration processing results and the training results

However, if the traditional floating-point multiplier is used in the hardware accelerator, it will cause problems such as reduced acceleration efficiency, high hardware overhead, and increased operating power consumption, which seriously hinders the application of neural network processors in embedded devices. The demand for real-time analysis and processing of data using neural network processors in future ultra-low power IoT end nodes

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